1,114 research outputs found
Performance analysis of Ethernet Powerlink protocol: Application to a new lift system generation
International audienceTo ensure control, present lifts use the Controller Area Network (CAN) bus for transmitting commands between components. Although it is largely adopted in the industrial process, CAN is not able to guarantee a sufficient throughput to transmit multimedia data or to meet the requirements of some safety standards. In this paper, we present a transition case from electrical/electromechanical components to a networked control system. The main element we focus on in the lift system is the safety chain. We propose to build the lift communication system around real-time Ethernet for more efficiency, smartness and safety. Furthermore, the use of the openSAFETY protocol as a safety layer over the real-time Ethernet allows the achievement of the required Safety Integrity Level (SIL). This adopted solution should meet the adopted standard IEC 61508 requirements
Routing on the Channel Dependency Graph:: A New Approach to Deadlock-Free, Destination-Based, High-Performance Routing for Lossless Interconnection Networks
In the pursuit for ever-increasing compute power, and with Moore's law slowly coming to an end, high-performance computing started to scale-out to larger systems. Alongside the increasing system size, the interconnection network is growing to accommodate and connect tens of thousands of compute nodes. These networks have a large influence on total cost, application performance, energy consumption, and overall system efficiency of the supercomputer. Unfortunately, state-of-the-art routing algorithms, which define the packet paths through the network, do not utilize this important resource efficiently. Topology-aware routing algorithms become increasingly inapplicable, due to irregular topologies, which either are irregular by design, or most often a result of hardware failures. Exchanging faulty network components potentially requires whole system downtime further increasing the cost of the failure. This management approach becomes more and more impractical due to the scale of today's networks and the accompanying steady decrease of the mean time between failures. Alternative methods of operating and maintaining these high-performance interconnects, both in terms of hardware- and software-management, are necessary to mitigate negative effects experienced by scientific applications executed on the supercomputer. However, existing topology-agnostic routing algorithms either suffer from poor load balancing or are not bounded in the number of virtual channels needed to resolve deadlocks in the routing tables.
Using the fail-in-place strategy, a well-established method for storage systems to repair only critical component failures, is a feasible solution for current and future HPC interconnects as well as other large-scale installations such as data center networks. Although, an appropriate combination of topology and routing algorithm is required to minimize the throughput degradation for the entire system. This thesis contributes a network simulation toolchain to facilitate the process of finding a suitable combination, either during system design or while it is in operation. On top of this foundation, a key contribution is a novel scheduling-aware routing, which reduces fault-induced throughput degradation while improving overall network utilization. The scheduling-aware routing performs frequent property preserving routing updates to optimize the path balancing for simultaneously running batch jobs. The increased deployment of lossless interconnection networks, in conjunction with fail-in-place modes of operation and topology-agnostic, scheduling-aware routing algorithms, necessitates new solutions to solve the routing-deadlock problem. Therefore, this thesis further advances the state-of-the-art by introducing a novel concept of routing on the channel dependency graph, which allows the design of an universally applicable destination-based routing capable of optimizing the path balancing without exceeding a given number of virtual channels, which are a common hardware limitation. This disruptive innovation enables implicit deadlock-avoidance during path calculation, instead of solving both problems separately as all previous solutions
Earliest-deadline-first service in heavy-traffic acyclic networks
This paper presents a heavy traffic analysis of the behavior of multi-class
acyclic queueing networks in which the customers have deadlines. We assume the
queueing system consists of J stations, and there are K different customer
classes. Customers from each class arrive to the network according to
independent renewal processes. The customers from each class are assigned a
random deadline drawn from a deadline distribution associated with that class
and they move from station to station according to a fixed acyclic route.
The customers at a given node are processed according to the
earliest-deadline-first
(EDF) queue discipline. At any time, the customers of each type at each node
have a lead time, the time until their deadline lapses. We model these lead
times as a random counting measure on the real line. Under heavy traffic
conditions and suitable scaling, it is proved that the measure-valued lead-time
process converges to a deterministic function of the workload process
On Cyclic Dependencies and Regulators in Time-Sensitive Networks
For time-sensitive networks, as in the context of
IEEE TSN and IETF Detnet, cyclic dependencies are associated
with certain fundamental properties such as improving availability
and decreasing reconfiguration effort. Nevertheless, the
existence of cyclic dependencies can cause very large latency
bounds or even global instability, thus making the proof of the
timing predictability of such networks a much more challenging
issue. Cyclic dependencies can be removed by reshaping
flows inside the network, by means of regulators. We consider
FIFO-per-class networks with two types of regulators: perflow
regulators and interleaved regulators (the latter reshape
entire flow aggregates). Such regulators come with a hardware
cost that is less for an interleaved regulator than for a perflow
regulator; both can affect the latency bounds in different
ways. We analyze the benefits of both types of regulators in
partial and full deployments in terms of latency. First, we
propose Low-Cost Acyclic Network (LCAN), a new algorithm
for finding the optimum number of regulators for breaking all
cyclic dependencies. Then, we provide another algorithm, Fixed-
Point Total Flow Analysis (FP-TFA), for computing end-to-end
delay bounds for general topologies, i.e., with and without cyclic
dependencies. An extensive analysis of these proposed algorithms
was conducted on generic grid topologies. For these test networks,
we find that FP-TFA computes small latency bounds; but, at
a medium to high utilization, the benefit of regulators becomes
apparent. At high utilization or for high line transmission-rates, a
small number of per-flow regulators has an effect on the latency
bound larger than a small number of interleaved regulators.
Moreover, interleaved regulators need to be placed everywhere
in the network to provide noticeable improvements. We validate
the applicability of our approaches on a realistic industrial timesensitive
network
Ku-band signal design study
Analytical tools, methods and techniques for assessing the design and performance of the space shuttle orbiter data processing system (DPS) are provided. The computer data processing network is evaluated in the key areas of queueing behavior synchronization and network reliability. The structure of the data processing network is described as well as the system operation principles and the network configuration. The characteristics of the computer systems are indicated. System reliability measures are defined and studied. System and network invulnerability measures are computed. Communication path and network failure analysis techniques are included
Worst-case end-to-end delays evaluation for SpaceWire networks
SpaceWire is a standard for on-board satellite networks chosen by the ESA as the basis for multiplexing payload and control traffic on future data-handling architectures. However, network designers need tools to ensure that the network is able to deliver critical messages on time. Current research fails to address this needs for SpaceWire networks. On one hand, many papers only seek to determine probabilistic results for end-to-end delays on Wormhole networks like SpaceWire. This does not provide sufficient guarantee for critical traffic. On the other hand, a few papers give methods to determine maximum latencies on wormhole networks that, unlike SpaceWire, have dedicated real-time mechanisms built-in. Thus, in this paper, we propose an appropriate method to compute an upper-bound on the worst-case end-to-end delay of a packet in a SpaceWire network
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