Developing critical embedded systems on multicore architectures: the Prelude-SchedMCore toolset

International audienceIn this paper we present an end-to-end framework for the design and the implementation of embedded systems on a symmetric multicore. The developer first specifies the system using the \prelude language, a formal real-time architecture description language. The Prelude compiler then translates the program into a set of communicating periodic tasks that preserves the semantics of the original program. The schedulability analysis is performed by the SchedMCore analyzer. If the program is schedulable, it can finally be executed on the target multicore architecture using the \schedmcore execution environment

A Review of Priority Assignment in Real-Time Systems

It is over 40 years since the first seminal work on priority assignment for real-time systems using fixed priority scheduling. Since then, huge progress has been made in the field of real-time scheduling with more complex models and schedulability analysis techniques developed to better represent and analyse real systems. This tutorial style review provides an in-depth assessment of priority assignment techniques for hard real-time systems scheduled using fixed priorities. It examines the role and importance of priority in fixed priority scheduling in all of its guises, including: preemptive and non-pre-emptive scheduling; covering single- and multi-processor systems, and networks. A categorisation of optimal priority assignment techniques is given, along with the conditions on their applicability. We examine the extension of these techniques via sensitivity analysis to form robust priority assignment policies that can be used even when there is only partial information available about the system. The review covers priority assignment in a wide variety of settings including: mixed-criticality systems, systems with deferred pre-emption, and probabilistic real-time systems with worstcase execution times described by random variables. It concludes with a discussion of open problems in the area of priority assignment

Mixed Criticality Systems - A Review : (13th Edition, February 2022)

This review covers research on the topic of mixed criticality systems that has been published since Vestal’s 2007 paper. It covers the period up to end of 2021. The review is organised into the following topics: introduction and motivation, models, single processor analysis (including job-based, hard and soft tasks, fixed priority and EDF scheduling, shared resources and static and synchronous scheduling), multiprocessor analysis, related topics, realistic models, formal treatments, systems issues, industrial practice and research beyond mixed-criticality. A list of PhDs awarded for research relating to mixed-criticality systems is also included

Integrated Task and Message Scheduling in Time-Triggered Aeronautic Systems

This thesis presents generation techniques for task and message configurations in time-triggered IMA architectures. The commonality among the given techniques is the problem of integrated task and message scheduling for time-triggered networks. The proposed approaches allow the automatic generation of task and message schedules, which comprises certain system requirements. Our first approach solves the task and message scheduling problem by regarding it as a graph problem. We present an off-line scheduling algorithm that traverses the precedence graph. The approach integrates task scheduling at system level and message scheduling at communication level by iteratively traversing the given precedence graph. The algorithm incorporates backtracking and path extension functionality, guaranteeing the consistency of the developed schedule. The main advantage of the algorithm is that it scales up well even for large avionics applications. Furthermore, this thesis extends ongoing research into task and message scheduling based on time-triggered networks by first using model checking techniques for solving this kind of problem. We demonstrate that state-of-the-art model checking and bounded model checking techniques can be used to compute a schedule that fulfills certain system requirements. Therefore, we introduce an approach that adopts the principle of symbolic state space exploration to schedule synthesis and provides a symbolic encoding which makes it possible to guarantee an optimal solution with respect to minimizing the system’s end-to-end latency. A developed heuristic approach extends this approach in order to increase scalability by preventing from an exhaustive search through a guided, weight-based state-space exploration. The developed approaches are implemented in a framework for scheduling synthesis. This framework enables the generation and investigate certain system configurations in terms of complexity. This is done by using a complexity evaluation approach, which is developed is this thesis.Diese Arbeit präsentiert Techniken zur Generierung von integrierten Task- und Message Konfigurationen für zeitgesteuerte IMA Architekturen. Den präsentierten Ansätzen liegt das Problem der Erzeugung von integrierten Task und Message Schedules für zeitgesteuerte Netzwerke zugrunde. Die entwickelten Ansätze generieren dabei automatisch integrierte Task und Message Schedules, die speziellen Systemanforderungen genügen. Unser erster Ansatz löst das Task und Message Scheduling Problem mittels Transformierung in ein Graphen - Problem. Ein Algorithmus wird entwickelt, der den Abhängigkeitsgraphen durchläuft und dabei sowohl das Task Scheduling auf Systemebene, als auch das Message Scheduling auf Kommunikationsebene einbezieht. Der präsentierte Ansatz arbeitet iterativ und enthält Überprüfungs- und Pfad-Erweiterungs-Funktionalität, die die zeitliche Konsistenz des entwickelten Schedules garantieren. Einer der Vorteile dieses Ansatzes ist die Skalierbarkeit, die es ermöglicht, auch größere aeronautische Architekturen zu untersuchen und entsprechende Konfigurationen bereitzustellen. Ein zweiter Ansatz beschreibt und löst erstmals das gegebene Problem mit Hilfe von Model - Checking Techniken. Diese Arbeit zeigt, dass aktuelle Model - Checking und Bounded Model - Checking Techniken genutzt werden können, um integrierte Task und Message Schedules zu berechnen, die speziellen Systemeigenschaften genügen. Wir präsentieren einen Ansatz, der das Prinzip der Zustandsraumexploration zur Scheduling Synthese nutzt. Dazu entwickeln wir eine symbolische Kodierung, die es nicht nur ermöglicht gültige Konfigurationen zu finden, sondern auch solche, die optimal sind bezüglich der Minimierung der Ende-zu-Ende Latenz. Zusätzlich präsentieren wir einen heuristischen Ansatz, der es erlaubt, die Skalierbarkeit deutlich zu verbessern, indem er das Problem der erschöpfenden Suche einschränkt. Die entwickelte Heuristik führt dabei eine gesteuerte, gewichtsbasierte Erkundung des Zustandsraumes durch. Die entwickelten Ansätze sind in einem Framework zur Scheduling Synthese implementiert. Dieses Framework erlaubt die Generierung von geeigneten System Konfigurationen als auch Komplexitätsuntersuchung für verschiedene Systemarchitektur - Szenarien. Dazu wird ein Ansatz zur Evaluierung von Komplexitätsuntersuchungen entwickelt