13,845 research outputs found
A Survey on Wireless Sensor Network Security
Wireless sensor networks (WSNs) have recently attracted a lot of interest in
the research community due their wide range of applications. Due to distributed
nature of these networks and their deployment in remote areas, these networks
are vulnerable to numerous security threats that can adversely affect their
proper functioning. This problem is more critical if the network is deployed
for some mission-critical applications such as in a tactical battlefield.
Random failure of nodes is also very likely in real-life deployment scenarios.
Due to resource constraints in the sensor nodes, traditional security
mechanisms with large overhead of computation and communication are infeasible
in WSNs. Security in sensor networks is, therefore, a particularly challenging
task. This paper discusses the current state of the art in security mechanisms
for WSNs. Various types of attacks are discussed and their countermeasures
presented. A brief discussion on the future direction of research in WSN
security is also included.Comment: 24 pages, 4 figures, 2 table
Scalable and Secure Aggregation in Distributed Networks
We consider the problem of computing an aggregation function in a
\emph{secure} and \emph{scalable} way. Whereas previous distributed solutions
with similar security guarantees have a communication cost of , we
present a distributed protocol that requires only a communication complexity of
, which we prove is near-optimal. Our protocol ensures perfect
security against a computationally-bounded adversary, tolerates
malicious nodes for any constant (not
depending on ), and outputs the exact value of the aggregated function with
high probability
Controlling trapping potentials and stray electric fields in a microfabricated ion trap through design and compensation
Recent advances in quantum information processing with trapped ions have
demonstrated the need for new ion trap architectures capable of holding and
manipulating chains of many (>10) ions. Here we present the design and detailed
characterization of a new linear trap, microfabricated with scalable
complementary metal-oxide-semiconductor (CMOS) techniques, that is well-suited
to this challenge. Forty-four individually controlled DC electrodes provide the
many degrees of freedom required to construct anharmonic potential wells,
shuttle ions, merge and split ion chains, precisely tune secular mode
frequencies, and adjust the orientation of trap axes. Microfabricated
capacitors on DC electrodes suppress radio-frequency pickup and excess
micromotion, while a top-level ground layer simplifies modeling of electric
fields and protects trap structures underneath. A localized aperture in the
substrate provides access to the trapping region from an oven below, permitting
deterministic loading of particular isotopic/elemental sequences via
species-selective photoionization. The shapes of the aperture and
radio-frequency electrodes are optimized to minimize perturbation of the
trapping pseudopotential. Laboratory experiments verify simulated potentials
and characterize trapping lifetimes, stray electric fields, and ion heating
rates, while measurement and cancellation of spatially-varying stray electric
fields permits the formation of nearly-equally spaced ion chains.Comment: 17 pages (including references), 7 figure
Practical issues for the implementation of survivability and recovery techniques in optical networks
Deterministic integration of quantum dots into on-chip multi-mode interference beamsplitters using in-situ electron beam lithography
The development of multi-node quantum optical circuits has attracted great
attention in recent years. In particular, interfacing quantum-light sources,
gates and detectors on a single chip is highly desirable for the realization of
large networks. In this context, fabrication techniques that enable the
deterministic integration of pre-selected quantum-light emitters into
nanophotonic elements play a key role when moving forward to circuits
containing multiple emitters. Here, we present the deterministic integration of
an InAs quantum dot into a 50/50 multi-mode interference beamsplitter via
in-situ electron beam lithography. We demonstrate the combined emitter-gate
interface functionality by measuring triggered single-photon emission on-chip
with . Due to its high patterning resolution as well
as spectral and spatial control, in-situ electron beam lithography allows for
integration of pre-selected quantum emitters into complex photonic systems.
Being a scalable single-step approach, it paves the way towards multi-node,
fully integrated quantum photonic chips.Comment: 20 pages, 5 figure
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