Simulation and analysis of adaptive routing and flow control in wide area communication networks

This thesis presents the development of new simulation and analytic models for the performance analysis of wide area communication networks. The models are used to analyse adaptive routing and flow control in fully connected circuit switched and sparsely connected packet switched networks. In particular the performance of routing algorithms derived from the L(_R-I) linear learning automata model are assessed for both types of network. A novel architecture using the INMOS Transputer is constructed for simulation of both circuit and packet switched networks in a loosely coupled multi- microprocessor environment. The network topology is mapped onto an identically configured array of processing centres to overcome the processing bottleneck of conventional Von Neumann architecture machines. Previous analytic work in circuit switched work is extended to include both asymmetrical networks and adaptive routing policies. In the analysis of packet switched networks analytic models of adaptive routing and flow control are integrated to produce a powerful, integrated environment for performance analysis The work concludes that routing algorithms based on linear learning automata have significant potential in both fully connected circuit switched networks and sparsely connected packet switched networks

Routing in packet switched computer communication networks

This thesis concerns the optimization of the routing path in packet-switched computer-communication networks. Computer-communication networks over the past decade are outlined. A glossary of some of the terms used throughout this thesis are introduced. A brief description follows of the advantages of packet switching over the more conventional circuit-switched scheme for information transfer. The important design variables that a network planner is faced with in the design of these networks are discussed. A general design problem is stated and then decomposed into simpler subproblems one of which is the link-capacity assignment problem, which is briefly discussed. The route-assignment problem is identified as being of particular importance and is specified. A network model is introduced and relationships between performance measures, input parameters and constraints that appear in the general design problem are discussed. The routing problem is the formulated and a heuristic routing procedure is suggested as a sub-optimum solution to the problem. Basic routing methods are discussed. The principles of datagram and virtual circuit techniques are explained with reference to the routing of packets throughout the network. The directory routing technique with alternate routing is identified as being a specific requirement and the operation of this technique is explained in more detail. Two basic algorithms are introduced. The first which determines the shortest, second shortest, third shortest, etc., paths between all pairs of nodes in a network. The second which determines from all the paths in the first algorithm, the best alternative paths between all pairs of nodes in a network. A heuristic routing algorithm for establishing routing tables at each of the individual nodes in a packet switched data network is presented. Among the properties of a desirable routing algorithm is that the paths established between all node pairs are such that the average packet delay from source to destination node is minimal. The heuristic-routing algorithm proposed is to-be implemented on a newly proposed SAPONET packet-switching network, with special emphasis on the minimization of the average packet delay of the network. Results are presented and discussed for different combinations of the primary, secondary, tertiary and fourth alternative paths obtained. Finally, results are summarized and areas for further work identified

Analysis of adaptive algorithms for an integrated communication network

Techniques were examined that trade communication bandwidth for decreased transmission delays. When the network is lightly used, these schemes attempt to use additional network resources to decrease communication delays. As the network utilization rises, the schemes degrade gracefully, still providing service but with minimal use of the network. Because the schemes use a combination of circuit and packet switching, they should respond to variations in the types and amounts of network traffic. Also, a combination of circuit and packet switching to support the widely varying traffic demands imposed on an integrated network was investigated. The packet switched component is best suited to bursty traffic where some delays in delivery are acceptable. The circuit switched component is reserved for traffic that must meet real time constraints. Selected packet routing algorithms that might be used in an integrated network were simulated. An integrated traffic places widely varying workload demands on a network. Adaptive algorithms were identified, ones that respond to both the transient and evolutionary changes that arise in integrated networks. A new algorithm was developed, hybrid weighted routing, that adapts to workload changes

Distributed and intelligent routing algorithm

A Network's topology and its routing algorithm are the key factors in determining the network performance. Therefore, in this thesis a generic model for implementing logical interconnection topologies in the software domain has been proposed to investigate the performance of the logical topologies and their routing algorithms for packet switched synchronous networks. A number of topologies are investigated using this model and a simple priority rule is developed to utilise the usage of the asymmetric 2 x 2 optical node. Although, logical topologies are ideal for optical (or any other) networks because of their relatively simple routing algorithms, there is a requirement for much more flexible algorithms that can be applied to arbitrary network topologies. Antnet is a software agent based routing algorithm that is influenced by the unsophisticated and individual ant's emergent behaviour. In this work a modified antnet algorithm for packet switched networks has been proposed that offers improvement in the packet throughput and the average delay time. Link usage information known as "evaporation" has also been introduced as an additional feedback signal to the algorithm to prevent stagnation within the network for the first time in the literature for the best our knowledge. Results show that, with "evaporation" the average delay experienced by the data packets is reduced nearly 30% compared to the original antnet routing algorithm for all cases when non-uniform traffic model is employed. The multiple ant colonies concept is also introduced and applied to packet switched networks for the first time which has increased the packet throughput. However, no improvement in the average packet delay is observed in this case. Furthermore, for the first time extensive analysis on the effect of a confidence parameter is produced here. A novel scheme which provides a more realistic implementation of the algorithms and flexibility to the programmer for simulating communication networks is proposed and used to implement these algorithms

Survey of unified approaches to integrated-service networks

The increasing demand for communication services, coupled with recent technological advances in communication media and switching techniques, has resulted in a proliferation of new and expanded services. Currently, networks are needed which can transmit voice, data, and video services in an application-independent fashion. Unified approaches employ a single switching technique across the entire network bandwidth, thus, allowing services to be switched in an application-independent manner. This paper presents a taxonomy of integrated-service networks including a look at N-ISDN, while focusing on unified approaches to integrated-service networks.The two most promising unified approaches are burst and fast packet switching. Burst switching is a circuit switching-based approach which allocates channel bandwidth to a connection only during the transmission of "bursts" of information. Fast packet switching is a packet switching-based approach which can be characterized by very high transmission rates on network links and simple, hardwired protocols which match the rapid channel speed of the network. Both approaches are being proposed as possible implementations for integrated-service networks. We survey these two approaches, and also examine the key performance issues found in fast packet switching. We then present the results of a simulation study of a fast packet switching network

Quarc: a high-efficiency network on-chip architecture

The novel Quarc NoC architecture, inspired by the Spidergon scheme is introduced as a NoC architecture that is highly efficient in performing collective communication operations including broadcast and multicast. The efficiency of the Quarc architecture is achieved through balancing the traffic which is the result of the modifications applied to the topology and the routing elements of the Spidergon NoC. This paper provides an ASIC implementation of both architectures using UMCpsilas 0.13 mum CMOS technology and demonstrates an analysis and comparison of the cost and performance between the Quarc and the Spidergon NoCs

1 x M packet-switched router based on the PPM header address for all-optical WDM networks

This paper presents an all-optical 1xM router architecture for simultaneous multiple-wavelength packet routing, without the need for wavelength conversion. The packet header address is based on the pulse position modulation (PPM) format, which allows the use of only a single-bitwise optical AND gate for fast packet header address correlation. The proposed scheme offers both multicast and broadcast capabilities. We’ve demonstrated a high speed packet routing at 160 Gb/s in simulation, with a low channel crosstalk (CXT) of ~ -27 dB with a channel spacing of > 0.4 THz and a demultiplexer bandwidth of 500 GHz. The output transfer function of the PPM header processing (PPM-HP) module is also investigated in this paper