High-Performance Power Converters for Telecom and Datacenter Applications

Telecommunication systems and datacenters require compact isolated power converters that maintain high efficiencies across wide operating ranges. This thesis introduces high-efficiency high-power-density isolated dc-dc converters suitable for such applications. These converters are based on the impedance control network (ICN) resonant converter architecture, which enables high performance by achieving soft-switching across wide variations in operating conditions. First, an ICN-based telecom bus converter is developed. The design of this ICN converter is optimized using an enhanced augmented state-space analysis approach. A 1-MHz 550-W prototype of this ICN converter achieves a peak efficiency of 97.6%, maintains &gt;95.3% full-power efficiency across 2:1 ranges of input voltage and output voltage, and &gt;93.6% efficiency across a 10:1 range of output power. Next, an approach to reduce the size of this ICN converter is developed, in which the three inductors of the converter are combined into a single integrated magnetic structure utilizing two coupled windings. The integrated magnetic structure is designed and optimized using 3D finite element analysis. This results in a very high performance 550-W quarter-brick ICN converter prototype, which maintains efficiencies comparable to those described above, while achieving a much higher power density of 462 W/in3. The ICN converter architecture is then applied to a large step-down conversion application &ndash; a single-stage isolated 48V-to-1.8V point-of-load (PoL) converter for datacenters. Three generations of this PoL ICN converter are developed, progressively achieving higher efficiencies and reduced size through innovations in the design of magnetically integrated matching networks and transformers, and through the utilization of transformer and rectifier architectures suitable for providing large voltage step-down. The final 1-MHz 90-W PoL ICN converter prototype provides up to 33:1 voltage step-down while achieving a peak efficiency of 92.6% and a power density of 314 W/in3. This thesis also describes an improved approach to optimizing the design of high-efficiency high-gain matching networks, with applications in large-conversion-ratio resonant converters and in wireless power transfer (WPT) systems. Finally, a high-frequency inverter architecture building upon the concepts of the ICN is developed, which compensates for coupling variations in WPT systems while maintaining high power transfer and high efficiency.</p

Capacitive coupled RFID tag using a new dielectric droplet encapsulation approach

Radio frequency identification (RFID) is a well-known and fast-growing technology used to identify people, animals and products. RFID tags are used to replace bar codes in a wide range of applications, to mention just a few, retail, transportation, logistics and healthcare. The two main driving aspects for most of research and development projects concerning RFID tags are the reduction of assembly costs and the downsizing of microchips. In that respect and considering an Industry 4.0 scenario, the study of a new assembly approach for passive and high frequency RFID tags has been proposed and studied in this thesis. In this new approach, which is based on the inkjet printing technology, a specifically designed radio frequency integrated circuit (RFIC) will be delivered, inside a liquid dielectric droplet, onto the antenna and no longer placed and oriented precisely as it happens nowadays with pick-and-place and flip chip machines. After a landing phase, the liquid droplet (with the encapsulated chip) will self-aligns with respect to the contact thanks to capillary forces driven by specifically designed wetting conditions on the substrate of the antenna. Finally, with few additional steps, the complete RFID tag is created. This research project brings to light a considerable simplification and a very high potential of parallelization, compatible with large volume manufacturing methods, in comparison to nowadays existing technologies. This may substantially drive down the fabrication costs. An in-depth analysis of electrical performances have been carefully undertaken and compliance with the ISO/IEC 144443 standard has been verified. Mathematical models have been developed showing fundamental limits for the maximum tag reading range and power requirements of the RFID reader

High frequency inverter-transformer-cycloconverter system for DC to AC (3-phase) power conversion

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.This thesis is concerned with a 3-phase multistage high frequency link DC to AC power conversion with a novel inverter-cycloconverter circuitry. The conversion system is composed of a high frequency PWM inverter, step-up high frequency transformer and cycloconverter with bidirectional switching devices. In first stage the DC voltage of the power source , say a submarine battery, is inverted to a system of 3-phase sinusoidally modulated I kHz alternative wave forms. For this purpose a suggested optimized PWM technique for 3-phase inverter operation is adopted, in which harmonic components up to 17 th ( 17 kHz) are eliminated from the inverter output voltages. In the second stage, for DC input isolation from AC output and also for a voltage transformation ( here stepping-up )a high frequency ( size reduced ) transformer is employed. Generalized high frequency operation, influence and side effects of the transformer on overall system design & performance is investigated. In the final stage the 1 kHz -to- 50 Hz conversion process is accomplished by a 3-phase cycloconverter. The proposed "nonlinear modulation strategy" for cycloconverter output voltage and associated harmonic analysis is demonstrated, in which the harmonic components up to 38th (1.9 kHz ) are eliminated from the conversion system output voltage. To assess the suggested functioning principles for the inverter & cycloconverter , the prototype conversion system was developed. Some design criteria and switching device selection are presented, together with different voltage & current wave forms of the prototype system under resistive & inductive load (induction motor) and their respective spectra

Resonant Circuit Topology for Radio Frequency Energy Harvesting

In this work the operation of a MOSFET based rectifier, composed of multiple stages of voltage doubler circuits used for radio frequency (RF) energy harvesting, is investigated. Analytical modeling of the input stage of the rectifier consisting of short-channel diode-connected transistors is carried out, and the equivalent input resistance obtained is used along with simulation results to improve impedance matching in the harvester. The criteria for voltage boosting and impedance matching, that are essential in the operation of energy harvester under low ambient RF levels, as well as the design considerations for a pi-match network to achieve matching to 50 Ohms, are elaborated on. In addition their application is demonstrated through simulations carried out using Advanced Design System (ADS) simulator. Furthermore, measurement results of an already fabricated dual-band RF harvester are presented, and the approach taken to improve the antenna design from the harvester chip measured input impedance is discussed. The integrated antenna-harvester system tested was capable of harvesting ambient RF power and generating DC output voltage levels above 1 V

High performance building blocks for wireless receiver: multi-stage amplifiers and low noise amplifiers

Different wireless communication systems utilizing different standards and for multiple applications have penetrated the normal people's life, such as Cell phone, Wireless LAN, Bluetooth, Ultra wideband (UWB) and WiMAX systems. The wireless receiver normally serves as the primary part of the system, which heavily influences the system performance. This research concentrates on the designs of several important blocks of the receiver; multi-stage amplifier and low noise amplifier. Two novel multi-stage amplifier typologies are proposed to improve the bandwidth and reduce the silicon area for the application where a large capacitive load exists. They were designed using AMI 0.5 m µ CMOS technology. The simulation and measurement results show they have the best Figure-of-Merits (FOMs) in terms of small signal and large signal performances, with 4.6MHz and 9MHz bandwidth while consuming 0.38mW and 0.4mW power from a 2V power supply. Two Low Noise Amplifiers (LNAs) are proposed, with one designed for narrowband application and the other for UWB application. A noise reduction technique is proposed for the differential cascode Common Source LNA (CS-LNA), which reduces the LNA Noise Figure (NF), increases the LNA gain, and improves the LNA linearity. At the same time, a novel Common Gate LNA (CG-LNA) is proposed for UWB application, which has better linearity, lower power consumption, and reasonable noise performance. Finally a novel practical current injection built-in-test (BIT) technique is proposed for the RF Front-end circuits. If the off-chip component Lg and Rs values are well controlled, the proposed technique can estimate the voltage gain of the LNA with less than 1dB (8%) error

Analysis and design of wideband voltage controlled oscillators using self-oscillating active inductors.

Voltage controlled oscillators (VCOs) are essential components of RF circuits used in transmitters and receivers as sources of carrier waves with variable frequencies. This, together with a rapid development of microelectronic circuits, led to an extensive research on integrated implementations of the oscillator circuits. One of the known approaches to oscillator design employs resonators with active inductors electronic circuits simulating the behavior of passive inductors using only transistors and capacitors. Such resonators occupy only a fraction of the silicon area necessary for a passive inductor, and thus allow to use chip area more eectively. The downsides of the active inductor approach include: power consumption and noise introduced by transistors. This thesis presents a new approach to active inductor oscillator design using selfoscillating active inductor circuits. The instability necessary to start oscillations is provided by the use of a passive RC network rather than a power consuming external circuit employed in the standard oscillator approach. As a result, total power consumption of the oscillator is improved. Although, some of the active inductors with RC circuits has been reported in the literature, there has been no attempt to utilise this technique in wideband voltage controlled oscillator design. For this reason, the dissertation presents a thorough investigation of self-oscillating active inductor circuits, providing a new set of design rules and related trade-os. This includes: a complete small signal model of the oscillator, sensitivity analysis, large signal behavior of the circuit and phase noise model. The presented theory is conrmed by extensive simulations of wideband CMOS VCO circuit for various temperatures and process variations. The obtained results prove that active inductor oscillator performance is obtained without the use of standard active compensation circuits. Finally, the concept of self-oscillating active inductor has been employed to simple and fast OOK (On-Off Keying) transmitter showing energy eciency comparable to the state of the art implementations reported in the literature

Design and Control of Power Converters for High Power-Quality Interface with Utility and Aviation Grids

Power electronics as a subject integrating power devices, electric and electronic circuits, control, and thermal and mechanic design, requires not only knowledge and engineering insight for each subarea, but also understanding of interface issues when incorporating these different areas into high performance converter design.Addressing these fundamental questions, the dissertation studies design and control issues in three types of power converters applied in low-frequency high-power transmission, medium-frequency converter emulated grid, and high-frequency high-density aviation grid, respectively, with the focus on discovering, understanding, and mitigating interface issues to improve power quality and converter performance, and to reduce the noise emission.For hybrid ac/dc power transmission,• Analyze the interface transformer saturation issue between ac and dc power flow under line unbalances.• Proposed both passive transformer design and active hybrid-line-impedance-conditioner to suppress this issue.For transmission line emulator,• Propose general transmission line emulation schemes with extension capability.• Analyze and actively suppress the effects of sensing/sampling bias and PWM ripple on emulation considering interfaced grid impedance.• Analyze the stability issue caused by interaction of the emulator and its interfaced impedance. A criterion that determines the stability and impedance boundary of the emulator is proposed.For aircraft battery charger,• Investigate architectures for dual-input and dual-output battery charger, and a three-level integrated topology using GaN devices is proposed to achieve high density.• Identify and analyze the mechanisms and impacts of high switching frequency, di/dt, dv/dt on sensing and power quality control; mitigate solutions are proposed.• Model and compensate the distortion due to charging transition of device junction capacitances in three-level converters.• Find the previously overlooked device junction capacitance of the nonactive devices in three-level converters, and analyze the impacts on switching loss, device stress, and current distortion. A loss calculation method is proposed using the data from the conventional double pulse tester.• Establish fundamental knowledge on performance degradation of EMI filters. The impacts and mechanisms of both inductive and capacitive coupling on different filter structures are understood. Characterization methodology including measuring, modeling, and prediction of filter insertion loss is proposed. Mitigation solutions are proposed to reduce inter-component coupling and self-parasitics

Dielectric barrier discharges: progress on plasma sources and on the understanding of regimes and single filaments

Dielectric barrier discharges (DBDs) are plasmas generated in configurations with an insulating (dielectric) material between the electrodes which is responsible for a self-pulsing operation. DBDs are a typical example of nonthermal atmospheric or normal pressure gas discharges. Initially used for the generation of ozone, they have opened up many other fields of application. Therefore DBDs are a relevant tool in current plasma technology as well as an object for fundamental studies. Another motivation for further research is the fact that so-called partial discharges in insulated high voltage systems are special types of DBDs. The breakdown processes, the formation of structures, and the role of surface processes are currently under investigation. This review is intended to give an update to the already existing literature on DBDs considering the research and development within the last two decades. The main principles and different modes of discharge generation are summarized. A collection of known as well as special electrode configurations and reactor designs will be presented. This shall demonstrate the different and broad possibilities, but also the similarities and common aspects of devices for different fields of applications explored within the last years. The main part is devoted to the progress on the investigation of different aspects of breakdown and plasma formation with the focus on single filaments or microdischarges. This includes a summary of the current knowledge on the electrical characterization of filamentary DBDs. In particular, the recent new insights on the elementary volume and surface memory mechanisms in these discharges will be discussed. An outlook for the forthcoming challenges on research and development will be given