Numerical analysis of lead-free solder joints: effects of thermal cycling and electromigration

To meet the requirements of miniaturization and multifunction in microelectronics, understanding of their reliability and performance has become an important research subject in order to characterise electronics served under various loadings. Along with the demands of the increasing miniaturization of electronic devices, various properties and the relevant thermo-mechanical-electrical response of the lead-free solder joints to thermal cycling and electro-migration become the critical factors, which affect the service life of microelectronics in different applications. However, due to the size and structure of solder interconnects in microelectronics, traditional methods based on experiments are not applicable in the evaluation of their reliability under complex joint loadings. This thesis presents an investigation, which is based on finite-element method, into the performance of lead-free solder interconnects under thermal fatigue and electro-migration, specifically in the areas as follows: (1) the investigation of thermal-mechanical performance and fatigue-life prediction of flip-chip package under different sizes to achieve a further understanding of IMC layer and size effects of a flip chip package under thermal cycling; (2) the establishment of a numerical method, simulating void-formation/crack-propagation based on the results of finite-element analysis, to allow the prediction of crack evolution and failure time for electro-migration reliability of solder bumps; (3) the establishment of a flow-based algorithm for combination effects of thermal-mechanical and electro-migration that was subsequent implemented in to an FE model to evaluate the reliability assessment of service lives associated with a flip chip package

End-of-Life and Constant Rate Reliability Modeling for Semiconductor Packages Using Knowledge-Based Test Approaches

End-of-life and constant rate reliability modeling for semiconductor packages are the focuses of this dissertation. Knowledge-based testing approaches are applied and the test-to-failure approach is approved to be a reliable approach. First of all, the end-of-life AF models for solder joint reliability are studied. The research results show using one universal AF model for all packages is flawed approach. An assessment matrix is generated to guide the application of AF models. The AF models chosen should be either assessed based on available data or validated through accelerated stress tests. A common model can be applied if the packages have similar structures and materials. The studies show that different AF models will be required for SnPb solder joints and SAC lead-free solder joints. Second, solder bumps under power cycling conditions are found to follow constant rate reliability models due to variations of the operating conditions. Case studies demonstrate that a constant rate reliability model is appropriate to describe non solder joint related semiconductor package failures as well. Third, the dissertation describes the rate models using Chi-square approach cannot correlate well with the expected failure mechanisms in field applications. The estimation of the upper bound using a Chi-square value from zero failure is flawed. The dissertation emphasizes that the failure data is required for the failure rate estimation. A simple but tighter approach is proposed and provides much tighter bounds in comparison of other approaches available. Last, the reliability of solder bumps in flip chip packages under power cycling conditions is studied. The bump materials and underfill materials will significantly influence the reliability of the solder bumps. A set of comparable bump materials and the underfill materials will dramatically improve the end-of-life solder bumps under power cycling loads, and bump materials are one of the most significant factors. Comparing to the field failure data obtained, the end-of-life model does not predict the failures in the field, which is more close to an approximately constant failure rate. In addition, the studies find an improper underfill material could change the failure location from solder bump cracking to ILD cracking or BGA solder joint failures

Solder Joint Reliability Of Flip Chip BGA Package

Daya tahan hubungan bebola pateri merupakan satu kriteria keboleharapan yang penting dalam pempakejan elektronik moden. The integrity of ball and bump solder joints is a major reliability concern in modern micro electronic packages

THERMAL CYCLING RELIABILITY OF LEAD-FREE SOLDERS (SAC305 AND SN3.5AG) FOR HIGH TEMPERATURE APPLICATIONS

Eutectic tin lead was the most widely used solder interconnect in the electronics industry before the adoption of lead-free legislation. But eutectic tin lead solder has a low melting point (183oC) and was not suited for some high temperature applications, such as oil and gas exploration, automotive, and defense. Hence, for these applications, the electronics industry had to rely on specialized solders. In this study, ball grid arrays (BGAs), quad flat packages (QFPs), and surface mount resistors assembled with SAC305 and Sn3.5Ag solder pastes were subjected to thermal cycling from -40oC to 185oC. Commercially available electroless nickel immersion gold (ENIG) board finish was compared to proprietary Sn-based board finish designed for high temperatures. The data analysis showed that the type of solder paste and board finish used did not have an impact on the reliability of BGAs. The failure site was on the package side of the solder joint. The morphology of intermetallic compounds (IMCs) formed after thermal cycling was analyzed

A THERMOMECHANICAL FATIGUE LIFE PREDICTION METHODOLOGY FOR BALL GRID ARRAY COMPONENTS WITH REWORKABLE UNDERFILL

Underfill materials were originally developed to improve the thermo-mechanical reliability of flip-chip devices due to the large coefficient of thermal expansion (CTE) mismatch between the silicon die and substrate. More recently, underfill materials, specifically reworkable underfills, have been used to improve reliability of second level interconnects in ball grid array (BGA) packages in harsh end-use environments such as automotive, military and aerospace. In these environments, electronic components are exposed to mechanical shock, vibration, and large fluctuations in temperatures. Although reworkable underfills improve the reliability of BGA components under mechanical shock and vibration, some reworkable underfills have been shown to reduce reliability during thermal cycling environments. Consequently, this research employs experimental and numerical approaches to investigate the impact of reworkable underfill materials on thermomechanical fatigue life of solder joints in BGA packages. In the first section of the analysis, material characterization of a reworkable underfill is performed to determine appropriate material models for reworkable underfills. In the second analysis section, a variety of underfill materials with different properties are exposed to harsh and benign thermal cycles to determine the stress state responsible for reducing fatigue life of solder joints in BGA packages. In the final analysis section, simulations are performed on the BGAs with reworkable underfill to develop a fatigue life predication methodology that implements a modified mode separation scheme. The model developed in this work provides a working fatigue life approach for BGA packages with reworkable underfills exposed to thermal loading. The results of this study can be utilized by the automotive, military, and aerospace industries to optimize underfill material selection process and provide reliability assessment of BGA components in real world environments

MICROSTRUCTURAL CHARACTERIZATION AND THERMAL CYCLING RELIABILITY OF SOLDERS UNDER ISOTHERMAL AGING AND ELECTRICAL CURRENT

Solder joints on printed circuit boards provide electrical and mechanical connections between electronic devices and metallized patterns on boards. These solder joints are often the cause of failure in electronic packages. Solders age under storage and operational life conditions, which can include temperature, mechanical loads, and electrical current. Aging occurring at a constant temperature is called isothermal aging. Isothermal aging leads to coarsening of the bulk microstructure and increased interfacial intermetallic compounds at the solder-pad interface. The coarsening of the solder bulk degrades the creep properties of solders, whereas the voiding and brittleness of interfacial intermetallic compounds leads to mechanical weakness of the solder joint. Industry guidelines on solder interconnect reliability test methods recommend preconditioning the solder assemblies by isothermal aging before conducting reliability tests. The guidelines assume that isothermal aging simulates a "reasonable use period," but do not relate the isothermal aging levels with specific use conditions. Studies on the effect of isothermal aging on the thermal cycling reliability of tin-lead and tin-silver-copper solders are limited in scope, and results have been contradictory. The effect of electrical current on solder joints has been has mostly focused on current densities above 104A/cm2 with high ambient temperature (≥100oC), where electromigration, thermomigration, and Joule heating are the dominant failure mechanisms. The effect of current density below 104A/cm2 on temperature cycling fatigue of solders has not been established. This research provides the relation between isothermal aging and the thermal cycling reliability of select Sn-based solders. The Sn-based solders with 3%, 1%, and 0% silver content that have replaced tin-lead are studied and compared against tin-lead solder. The activation energy and growth exponents of the Arrhenius model for the intermetallic growth in the solders are provided. An aging metric to quantify the aging of solder joints, in terms of phase size in the solder bulk and interfacial intermetallic compound thickness at the solder-pad interface, is established. Based on the findings of thermal cycling tests on aged solder assemblies, recommendations are made for isothermal aging of solders before thermal cycling tests. Additionally, the effect of active electrical current at 103 A/cm2 on thermal cycling reliability is reported

The durability of solder joints under thermo-mechanical loading; application to Sn-37Pb and Sn-3.8Ag-0.7Cu lead-free replacement alloy

Solder joints in electronic packages provide mechanical, electrical and thermal connections. Hence, their reliability is also a major concern to the electronic packaging industry. Ball Grid Arrays (BGAs) are a very common type of surface mount technology for electronic packaging. This work primarily addresses the thermo-mechanical durability of BGAs and is applied to the exemplar alloys; traditional leaded solder and a popular lead-free solder. Isothermal mechanical fatigue tests were carried out on 4-ball test specimens of the lead-free (Sn-3.8Ag-0.7Cu) and leaded (Sn-37Pb) solder under load control at room temperature, 35°C and 75°C. As well as this, a set of combined thermal and mechanical cycling tests were carried out, again under load control with the thermal cycles either at a different frequency from the mechanical cycles (not-in-phase) or at the same frequency (both in phase and out-of-phase). The microstructural evaluation of both alloys was investigated by carrying out a series of simulated ageing tests, coupled with detailed metallurgical analysis and hardness testing. The results were treated to produce stress-life, cyclic behaviour and creep curves for each of the test conditions. Careful calibration allowed the effects of substrate and grips to be accounted for and so a set of strain-life curves to be produced. These results were compared with other results from the literature taking into account the observations on microstructure made in the ageing tests. It is generally concluded that the TMF performance is better for the Sn-Ag-Cu alloy than for the Sn-Pb alloy, when expressed as stress-life curves. There is also a significant effect on temperature and phase for each of the alloys, the Sn-Ag-Cu being less susceptible to these effects. When expressed as strain life, the effects of temperature, phase and alloy type are much diminished. Many of these conclusions coincided with only parts of the literature and reasons for the remaining differences are advanced

Development of a Rapid Fatigue Life Testing Method for Reliability Assessment of Flip-Chip Solder Interconnects

The underlying physics of failure are critical in assessing the long term reliability of power packages in their intended field applications, yet traditional reliability determination methods are largely inadequate when considering thermomechanical failures. With current reliability determination methods, long test durations, high costs, and a conglomerate of concurrent reliability degrading threat factors make effective understanding of device reliability difficult and expensive. In this work, an alternative reliability testing apparatus and associated protocol was developed to address these concerns; targeting rapid testing times with minimal cost while preserving fatigue life prediction accuracy. Two test stands were fabricated to evaluate device reliability at high frequency (60 cycles/minute) with the first being a single-directional unit capable of exerting large forces (up to 20 N) on solder interconnects in one direction. The second test stand was developed to allow for bi-directional application of stress and the integration of an oven to enable testing at elevated steady-state temperatures. Given the high frequency of testing, elevated temperatures are used to emulate the effects of creep on solder fatigue lifetime. Utilizing the mechanical force of springs to apply shear loads to solder interconnects within the devices, the reliability of a given device to withstand repeated cycling was studied using resistance monitoring techniques to detect the number of cycles-to-failure (CTF). Resistance monitoring was performed using specially designed and fabricated, device analogous test vehicles assembled with the ability to monitor circuit resistance in situ. When a resistance rise of 30 % was recorded, the device was said to have failed. A mathematical method for quantifying the plastic work density (amount of damage) sustained by the solder interconnects prior to failure was developed relying on the relationship between Hooke’s Law for springs and damage deflection to accurately assess the mechanical strength of tested devices

Characterising Solder Materials from Random Vibration Response of their Interconnects in BGA Packaging

Solder interconnection in electronic packaging is the weakest link, thus driving the reliability of electronic modules and systems. Improving interconnection integrity in safety-critical applications is vital in enhancing application reliability. This investigation qualifies the random vibration response of five essential solder compositions in ball grid array (BGA) solder joints used in safety-critical applications. The solder compositions are eutectic Sn63Pb37 and SnAgCu (SAC) 305, 387, 396, and 405. Computer-aided engineering (CAE) employing ANSYS FEA and SolidWorks software is implemented in this investigation. The solder Sn63Pb37 deformed least at 0.43 µm, followed by SAC396 at 0.58 µm, while SAC405 deformed highest at 0.88 µm. Further analysis demonstrates that possession of higher elastic modulus and mass density culminates in lower solder joint deformation. Stress is concentrated at the periphery of the solder joints in contact with the printed circuit board (PCB). The SAC396 solder accumulates the lowest stress of 14.1 MPa, followed by SAC405 at 17.9 MPa, while eutectic Sn63Pb37 accrues the highest at 34.6 MPa. Similarly, strain concentration is found at the interface between the solder joint and copper pad on PCB. SAC405 acquires the lowest elastic strain magnitude of 0.0011 mm/mm, while SAC305 records the highest strain of 0.002 mm/mm. These results demonstrate that SAC405 solder has maximum and SAC387 solder has minimum fatigue lives

Solder Interconnect Life Prediction under Complex Temperature Cycling with Varying Mean and Amplitude

Electronic devices are under concurrent loading of the power cycling of the devices and the temperature cycling from the surrounding environment. Temperature histories resultant from these concurrent loading would be a complex temperature cycling with varying cyclic temperature mean and amplitude, as well as spatial thermal gradient. This study developed modeling approaches and quantified accuracies for predicting solder interconnect life under complex temperature cycling. Three modeling approaches were presented in this study: 1) modeling the strain energy under the resultant complex temperature cycling and employing the energy based fatigue life models; 2) segmenting the resultant complex temperature cycle into multiple simple temperature cycles with a single temperature range for each first, then assessing the life expectancy of the solder interconnect under the segmented simple temperature cycles and at last applying Miner's rule to superpose the damage; 3) estimating solder damage under the resultant complex temperature cycling by a standard temperature cycling with a single temperature range. Two case studies were included in this thesis: 1) chamber controlled complex temperature cycling with mini cycles occurring at the upper excursion on ceramic leadless chip carriers assembled by Sn36Pb62Ag2 and SnAg3.0Cu0.5 solder (without spatial thermal gradient); 2) combined temperature and power cycling on plastic ball grid array assembled by Sn63Pb37 and SnAg3.0Cu0.5 solder (with spatial thermal gradient). Physical tests were also conducted to quantify the developed modeling approaches