Register transformations with multiple clock domains

Abstract. Modern circuit design increasingly relies on multiple clock domains-- at different frequencies and with different phases-- in order to achieve performance and power requirements. In this paper, we identify a special case ofmultiple clocking that encompasses typical design styles, and we present a theory enabling a wide range of register transformations relating to the multipleclock domains. For example, we can perform pipelining, phase abstraction, and retiming across clock domain boundaries. We believe our theory will be usefulto extend current work on formal hardware design, synthesis, and verification to multiple-clock-domain systems