A hardware implementation of a Viterbi decoder for a (3,2/3) TCM code

The report details the design of a dedicated Viterbi decoder chip set for an Ungerboek (3,2/3) Trellis Coded Modulation code. It was the specific intention of the thesis to design a system that could be implemented on standard Field Programmable Gate Arrays (FPGA) yet still be able to cope with high bit rates. The focus of the research was to both evaluate and modify the existing VLSI design techniques and to develop new techniques to make this possible. Trellis Coded Modulation refers to a specific sub-class of convolutional codes that ire an example of coded modulation. In coded modulation there is a direct link between the encoding and modulation processes aimed at improving the performance of the code by introducing redundancy in the signal set used to transmit the code. Ungerboek developed a technique for mapping the encoded words onto points in the signal set, called mapping by set partitioning, that maximises the Euclidian distance between adjacent codewords, and hence maximises the minimum distance between any two output sequences in the code. The Viterbi algorithm is a maximum likelihood decoder for convolutional codes such as TCM. The operation of the Viterbi algorithm is based on using soft decision decoding to produce an estimate of how well the received sequence corresponds with any of the allowed code sequences. The code sequences which most closely matches the received sequence is then decoded to form the output of the decoder. A central problem in implementing systems using TCM with Viterbi decoding is that although the encoder is a relatively simple device, the decoder is not. The complexity of the Viterbi decoder for any given TCM scheme will be the major drawback in implementing the scheme. As such techniques for reducing the complexity of Viterbi decoders are of interest to developers of communication systems. The algorithms describing the implementation and operation of the Viterbi algorithm can be categorised into three main layers. The top layer holds the theoretical algorithm itself, in the second layer are the set of algorithms that describe the broad techniques used to manipulate the theoretical algorithm into a form in which it can be implemented, and the third layer of algorithms describe the implementations themselves. The work contained in this thesis concentrates on the second two layers of algorithms

Feasibility study of 5G low-latency packet radio communications without preambles

This thesis deals with the feasibility of having lower latency for radio communication of short packets, which is the major traffic in the fifth generation (5G) of cellular systems. We will examine the possibility of using turbo synchronization instead of using a long preamble, which is needed for Data-Aided (DA) synchronization. The idea behind this is that short packets are required in low-latency applications. The overhead of preambles is very significant in case of short packets. Turbo synchronization allows to work with short or null preambles. The simulations will be run for a turbo synchronizer which has been implemented according to the Expectation Maximization (EM) formulation of the problem. The simulation results show that the implemented turbo synchronizer outperforms or attains the DA synchronizer in terms of reliability, accuracy and acquisition range for carrier phase synchronization. It means that the idea of eliminating the preamble from the short packet seems practical. The only downward is that there is a packet size limitation for the effective functionality of turbo synchronizer. Simulations indicate that the number of transmitted symbols should be higher than 128 coded symbols

Representation theory for high-rate multiple-antenna code design

Multiple antennas can greatly increase the data rate and reliability of a wireless communication link in a fading environment, but the practical success of using multiple antennas depends crucially on our ability to design high-rate space-time constellations with low encoding and decoding complexity. It has been shown that full transmitter diversity, where the constellation is a set of unitary matrices whose differences have nonzero determinant, is a desirable property for good performance. We use the powerful theory of fixed-point-free groups and their representations to design high-rate constellations with full diversity. Furthermore, we thereby classify all full-diversity constellations that form a group, for all rates and numbers of transmitter antennas. The group structure makes the constellations especially suitable for differential modulation and low-complexity decoding algorithms. The classification also reveals that the number of different group structures with full diversity is very limited when the number of transmitter antennas is large and odd. We, therefore, also consider extensions of the constellation designs to nongroups. We conclude by showing that many of our designed constellations perform excellently on both simulated and real wireless channels

COSSAP simulation model of DS-CDMA indoor microwave ATM LAN

This thesis presents an original work in the area of designing and implementing a simulation testbed for modelling a high speed spread spectrum Asynchronous Transfer Mode (ATM) Local Area Network (LAN). The spread spectrum technique used in this LAN model is Direct Sequence Code Division Multiple Access (DS-CDMA). The simulation model includes at least a physical layer of such a LAN, embedded into the COSSAP1 simulation environment, and has been fully tested. All the newly developed building blocks are comprised of standard blocks from the COSSAP libraries or compatible user-built primitive blocks (only where it is absolutely necessary), and are flexible enough to allow the modification of simulation or model parameters; such as the number of signal channels, modulation method used, different spreading code sequences and so on. All these changes can be made with minimal effort. Another significant contribution made in this thesis is the extended research into evaluating the Bit Error Rate (BER) performance of different spread spectrum COMA coding schemes for an indoor microwave A1M LAN [8]. Different spread spectrum CDMA coding schemes are compared for their transmission error rate in Additive White Gaussian Noise (AWGN) channel with varying transmitted signal power and at different channel Signal to Noise Ratio (SNR) levels. Since a wireless microwave channel is very prone to transmission errors, a major contribution of the simulation testbed developed in this thesis is its use in the finding of an optimal physical layer transmission scheme with the best Bit Error Rate (BER) performance in an indoor environment

Synchronization in digital communication systems: performance bounds and practical algorithms

Communication channels often transfer signals from different transmitters. To avoid interference the available frequency spectrum is divided into non-overlapping frequency bands (bandpass channels) and each transmitter is assigned to a different bandpass channel. The transmission of a signal over a bandpass channel requires a shift of its frequency-content to a frequency range that is compatible with the designated frequency band (modulation). At the receiver, the modulated signal is demodulated (frequency shifted back to the original frequency band) in order to recover the original signal. The modulation/demodulation process requires the presence of a locally generated sinusoidal signal at both the transmitter and the receiver. To enable a reliable information transfer, it is imperative that these two sinusoids are accurately synchronized. Recently, several powerful channel codes have been developed which enable reliable communication at a very low signal-to-noise ratio (SNR). A by-product of these developments is that synchronization must now be performed at a SNR that is lower than ever before. Of course, this imposes high requirements on the synchronizer design. This doctoral thesis investigates to what extent (performance bounds) and in what way (practical algorithms) the structure that the channel code enforces upon the transmitted signal can be exploited to improve the synchronization accuracy at low SNR