Rapid Wireless Capacitor Charging Using a Multi-Tapped Inductively-Coupled Secondary Coil

This paper presents an inductive coupling system designed to wirelessly charge ultra-capacitors used as energy storage elements. Although ultra-capacitors offer the native ability to rapidly charge, it is shown that standard inductive coupling circuits only deliver maximal power for a specific load impedance which depends on coil geometries and separation distances. Since a charging ultra-capacitor can be modeled as an increasing instantaneous impedance, maximum power is thus delivered to the ultra-capacitor at only a single point in the charging interval, resulting in a longer than optimal charging time. Analysis of inductive coupling theory reveals that the optimal load impedance can be modified by adjusting the secondary coil inductance and resonant tuning capacitance. A three-tap secondary coil is proposed to dynamically modify the optimal load impedance throughout the capacitor charging interval. Measurement results show that the proposed architecture can expand its operational range by up to 2.5 × and charge a 2.5 F ultra-capacitor to 5 V upwards of 3.7 × faster than a conventional architecture.Semiconductor Research Corporation. Interconnect Focus Cente

Design and Development of a Wireless Lamp Charging System

Wireless is a technology of transmitting power through an air gap to electrical devices for the purpose of energy replenishment. The recent progress in wireless charging techniques and development of commercial products has provided a promising alternative way to address the energy tailback of unadventurously portable-power devices. This work is an innovative application of Faraday’s laws of electromagnetic induction. A charging station sends energy through inductive coupling to an electrical device, which stores the energy in the batteries. Because there is a small gap between the two coils, inductive charging is one kind of short-distance wireless energy transfer. Induction coils are attached to transmitter and the portable device, so that the device receives power from the electromagnetic field created by the transmitting unit and stores the energy in the battery

A Sub-nW 2.4 GHz Transmitter for Low Data-Rate Sensing Applications

This paper presents the design of a narrowband transmitter and antenna system that achieves an average power consumption of 78 pW when operating at a duty-cycled data rate of 1 bps. Fabricated in a 0.18 μm CMOS process, the transmitter employs a direct-RF power oscillator topology where a loop antenna acts as a both a radiative and resonant element. The low-complexity single-stage architecture, in combination with aggressive power gating techniques and sizing optimizations, limited the standby power of the transmitter to only 39.7 pW at 0.8 V. Supporting both OOK and FSK modulations at 2.4 GHz, the transmitter consumed as low as 38 pJ/bit at an active-mode data rate of 5 Mbps. The loop antenna and integrated diodes were also used as part of a wireless power transfer receiver in order to kick-start the system power supply prior to energy harvesting operation.Semiconductor Research Corporation. Interconnect Focus CenterSemiconductor Research Corporation. C2S2 Focus CenterNational Institutes of Health (U.S.) (Grant K08 DC010419)National Institutes of Health (U.S.) (Grant T32 DC00038)Bertarelli Foundatio

Rapid Wireless Capacitor Charging Using a Multi-Tapped Inductively-Coupled Secondary Coil

This paper presents an inductive coupling system designed to wirelessly charge ultra-capacitors used as energy storage elements. Although ultra-capacitors offer the native ability to rapidly charge, it is shown that standard inductive coupling circuits only deliver maximal power for a specific load impedance which depends on coil geometries and separation distances. Since a charging ultra-capacitor can be modeled as an increasing instantaneous impedance, maximum power is thus delivered to the ultra-capacitor at only a single point in the charging interval, resulting in a longer than optimal charging time. Analysis of inductive coupling theory reveals that the optimal load impedance can be modified by adjusting the secondary coil inductance and resonant tuning capacitance. A three-tap secondary coil is proposed to dynamically modify the optimal load impedance throughout the capacitor charging interval. Measurement results show that the proposed architecture can expand its operational range by up to 2.5 × and charge a 2.5 F ultra-capacitor to 5 V upwards of 3.7 × faster than a conventional architecture.Semiconductor Research Corporation. Interconnect Focus Cente

RF Power Transfer, Energy Harvesting, and Power Management Strategies

Energy harvesting is the way to capture green energy. This can be thought of as a recycling process where energy is converted from one form (here, non-electrical) to another (here, electrical). This is done on the large energy scale as well as low energy scale. The former can enable sustainable operation of facilities, while the latter can have a significant impact on the problems of energy constrained portable applications. Different energy sources can be complementary to one another and combining multiple-source is of great importance. In particular, RF energy harvesting is a natural choice for the portable applications. There are many advantages, such as cordless operation and light-weight. Moreover, the needed infra-structure can possibly be incorporated with wearable and portable devices. RF energy harvesting is an enabling key player for Internet of Things technology. The RF energy harvesting systems consist of external antennas, LC matching networks, RF rectifiers for ac to dc conversion, and sometimes power management. Moreover, combining different energy harvesting sources is essential for robustness and sustainability. Wireless power transfer has recently been applied for battery charging of portable devices. This charging process impacts the daily experience of every human who uses electronic applications. Instead of having many types of cumbersome cords and many different standards while the users are responsible to connect periodically to ac outlets, the new approach is to have the transmitters ready in the near region and can transfer power wirelessly to the devices whenever needed. Wireless power transfer consists of a dc to ac conversion transmitter, coupled inductors between transmitter and receiver, and an ac to dc conversion receiver. Alternative far field operation is still tested for health issues. So, the focus in this study is on near field. The goals of this study are to investigate the possibilities of RF energy harvesting from various sources in the far field, dc energy combining, wireless power transfer in the near field, the underlying power management strategies, and the integration on silicon. This integration is the ultimate goal for cheap solutions to enable the technology for broader use. All systems were designed, implemented and tested to demonstrate proof-of concept prototypes

Design of Power Management Integrated Circuits and High-Performance ADCs

A battery-powered system has widely expanded its applications to implantable medical devices (IMDs) and portable electronic devices. Since portable devices or IMDs operate in the energy-constrained environment, their low-power operations in combination with efficiently sourcing energy to them are key problems to extend device life. This research proposes novel circuit techniques for two essential functions of a power receiving unit (PRU) in the energy-constrained environment, which are power management and signal processing. The first part of this dissertation discusses power management integrated circuits for a PRU. From a power management perspective, the most critical two circuit blocks are a front-end rectifier and a battery charger. The front-end CMOS active rectifier converts transmitted AC power into DC power. High power conversion efficiency (PCE) is required to reduce power loss during the power transfer, and high voltage conversion ratio (VCR) is required for the rectifier to enable low-voltage operations. The proposed 13.56-MHz CMOS active rectifier presents low-power circuit techniques for comparators and controllers to reduce increasing power loss of an active diode with offset/delay calibration. It is implemented with 5-V devices of a 0.35 µm CMOS process to support high voltage. A peak PCE of 89.0%, a peak VCR of 90.1%, and a maximum output power of 126.7 mW are measured for 200Ω loading. The linear battery charger stores the converted DC power into a battery. Since even small power saving can be enough to run the low-power PRU, a battery charger with low IvQ is desirable. The presented battery charger is based on a single amplifier for regulation and the charging phase transition from the constant-current (CC) phase to the constant-voltage (CV) phase. The proposed unified amplifier is based on stacked differential pairs which share the bias current. Its current-steering property removes multiple amplifiers for regulation and the CC-CV transition, and achieves high unity-gain loop bandwidth for fast regulation. The charger with the maximum charging current of 25 mA is implemented in 0.35 µm CMOS. A peak charger efficiency of 94% and average charger efficiency of 88% are achieved with an 80-mAh Li-ion polymer battery. The second part of this dissertation focuses on analog-to-digital converters (ADCs). From a signal processing perspective, an ADC is one of the most important circuit blocks in the PRU. Hence, an energy-efficient ADC is essential in the energy-constrained environment. A pipelined successive approximation register (SAR) ADC has good energy efficiency in a design space of moderate-to-high speeds and resolutions. Process-Voltage-Temperature variations of a dynamic amplifier in the pipelined-SAR ADC is a key design issue. This research presents two dynamic amplifier architectures for temperature compensation. One is based on a voltage-to-time converter (VTC) and a time-to-voltage converter (TVC), and the other is based on a temperature-dependent common-mode detector. The former amplifier is adopted in a 13-bit 10-50 MS/s subranging pipelined-SAR ADC fabricated in 0.13-µm CMOS. The ADC can operate under the power supply voltage of 0.8-1.2 V. Figure-of-Merits (FoMs) of 4-11.3 fJ/conversion-step are achieved. The latter amplifier is also implemented in 0.13-µm CMOS, consuming 0.11 mW at 50 MS/s. Its measured gain variation is 2.1% across the temperature range of -20°C to 85 °C

Ultra-low-power circuits and systems for wearable and implantable medical devices

Thesis (Ph. D.)--Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.Includes bibliographical references (pages 219-231).Advances in circuits, sensors, and energy storage elements have opened up many new possibilities in the health industry. In the area of wearable devices, the miniaturization of electronics has spurred the rapid development of wearable vital signs, activity, and fitness monitors. Maximizing the time between battery recharge places stringent requirements on power consumption by the device. For implantable devices, the situation is exacerbated by the fact that energy storage capacity is limited by volume constraints, and frequent battery replacement via surgery is undesirable. In this case, the design of energy-efficient circuits and systems becomes even more crucial. This thesis explores the design of energy-efficient circuits and systems for two medical applications. The first half of the thesis focuses on the design and implementation of an ultra-low-power, mixed-signal front-end for a wearable ECG monitor in a 0.18pm CMOS process. A mixed-signal architecture together with analog circuit optimizations enable ultra-low-voltage operation at 0.6V which provides power savings through voltage scaling, and ensures compatibility with state-of-the-art DSPs. The fully-integrated front-end consumes just 2.9[mu]W, which is two orders of magnitude lower than commercially available parts. The second half of this thesis focuses on ultra-low-power system design and energy-efficient neural stimulation for a proof-of-concept fully-implantable cochlear implant. First, implantable acoustic sensing is demonstrated by sensing the motion of a human cadaveric middle ear with a piezoelectric sensor. Second, alternate energy-efficient electrical stimulation waveforms are investigated to reduce neural stimulation power when compared to the conventional rectangular waveform. The energy-optimal waveform is analyzed using a computational nerve fiber model, and validated with in-vivo ECAP recordings in the auditory nerve of two cats and with psychophysical tests in two human cochlear implant users. Preliminary human subject testing shows that charge and energy savings of 20-30% and 15-35% respectively are possible with alternative waveforms. A system-on-chip comprising the sensor interface, reconfigurable sound processor, and arbitrary-waveform neural stimulator is implemented in a 0.18[mu]m high-voltage CMOS process to demonstrate the feasibility of this system. The sensor interface and sound processor consume just 12[mu]W of power, representing just 2% of the overall system power which is dominated by stimulation. As a result, the energy savings from using alternative stimulation waveforms transfer directly to the system.by Marcus Yip.Ph.D