Computational methods and software systems for dynamics and control of large space structures

Two key areas of crucial importance to the computer-based simulation of large space structures are discussed. The first area involves multibody dynamics (MBD) of flexible space structures, with applications directed to deployment, construction, and maneuvering. The second area deals with advanced software systems, with emphasis on parallel processing. The latest research thrust in the second area involves massively parallel computers

A Preconditioned Waveform Relaxation Solver for Signal Integrity Analysis of High-Speed Channels

This work presents a fast transient solver for Signal Integrity analysis of high-speed channels. We consider general chip-to-chip coupled interconnect structures, including arbitrary discontinuities at chip, package and board level. An external characterization of the interconnect in terms of tabulated scattering frequency samples is first converted to a closed-form macromodel, whose transient effects on input signals can be computed very efficiently through recursive convolutions. When combined with suitable models for drivers and receivers, a large-scale but very sparse system of equations is obtained. The latter is solved by an iterative scheme based on the Generalized Minimal RESidual (GMRES) method, further enhanced by a preconditioner based on Waveform-Relaxation. Contrary to previous formulations, the proposed scheme is guaranteed to converge in few iterations. Numerical examples show that the proposed solver outperforms standard SPICE in terms of runtime, with no loss of accuracy

SCEE 2008 book of abstracts : the 7th International Conference on Scientific Computing in Electrical Engineering (SCEE 2008), September 28 – October 3, 2008, Helsinki University of Technology, Espoo, Finland

This report contains abstracts of presentations given at the SCEE 2008 conference.reviewe

Time-Domain Macromodeling of High Speed Distributed Networks

With the rapid growth in density, operating speeds and complexity of modern very-large-scale integration (VLSI) circuits, there is a growing demand on efficient and accurate modeling and simulation of high speed interconnects and packages in order to ensure the signal integrity, reliability and performance of electronic systems. Such models can be derived from the knowledge of the physical characteristics of the structure or based on the measured port-to-port response.In the first part of this thesis, a passive macromodeling technique based on Method of Characteristics (referred as Passive Method of Characteristics or PMoC) is described which is applicable for modeling of electrically long high-speed interconnect networks. This algorithm is based on extracting the propagation delay of the interconnect followed by a low order rational approximation to capture the attenuation effects. The key advantage of the algorithm is that the curve fitting to realize the macromodel depends only on per-unit-length (p.u.l.) parameters and not on the length of the transmission line. In this work, the PMoC is developed to model multiconductor transmission lines.Next, an efficient approach for time domain sensitivity analysis of lossy high speed interconnects in the presence of nonlinear terminations is presented based on PMoC. An important feature of the proposed method is that the sensitivities are obtained from the solution of the original network, leading to significant computational advantages. The sensitivity analysis is also used to optimize the physical parameters of the network to satisfy the required design constraints. A time-domain macromodel for lossy multiconductor transmission lines exposed to electromag¬netic interference is also described in this thesis based on PMoC. The algorithm provides an efficient mechanism to ensure the passivity of the macromodel for different line lengths. Numerical examples illustrate that when compared to other passive incident field coupling algorithms, the proposed method is efficient in modeling electrically long interconnects since delay extraction without segmentation is used to capture the frequency response.In addition, this thesis discusses macromodeling techniques for complex packaging structures based on the frequency-domain behavior of the system obtained from measurements or electromagnetic simulators. Such techniques approximate the transfer function of the interconnect network as a rational function which can be embedded with modern circuit simulators with integrated circuit emphasis (SPICE). One of the most popular tools for rational approximations of measured or simulated data is based on vector fitting (VF) algorithms. Nonetheless, the vector fitting algorithms usually suffer convergence issues and lack of accuracy when dealing with noisy measured data. As a part of this thesis, a methodology is presented to improve the convergence and accuracy issues of vector fitting algorithm based on instrumental variable technique. This methodology is based on obtaining the “instruments” in an iterative manner and do not increase the complexity of vector fitting to capture the frequency response and minimize the biasing

Transient simulation of complex electronic circuits and systems operating at ultra high frequencies

The electronics industry worldwide faces increasingly difficult challenges in a bid to produce ultra-fast, reliable and inexpensive electronic devices. Electronic manufacturers rely on the Electronic Design Automation (EDA) industry to produce consistent Computer A id e d Design (CAD) simulation tools that w ill enable the design of new high-performance integrated circuits (IC), the key component of a modem electronic device. However, the continuing trend towards increasing operational frequencies and shrinking device sizes raises the question of the capability of existing circuit simulators to accurately and efficiently estimate circuit behaviour. The principle objective of this thesis is to advance the state-of-art in the transient simulation of complex electronic circuits and systems operating at ultra high frequencies. Given a set of excitations and initial conditions, the research problem involves the determination of the transient response o f a high-frequency complex electronic system consisting of linear (interconnects) and non-linear (discrete elements) parts with greatly improved efficien cy compared to existing methods and with the potential for very high accuracy in a way that permits an effective trade-off between accuracy and computational complexity. High-frequency interconnect effects are a major cause of the signal degradation encountered b y a signal propagating through linear interconnect networks in the modem IC. Therefore, the development of an interconnect model that can accurately and efficiently take into account frequency-dependent parameters of modem non-uniform interconnect is of paramount importance for state-of-art circuit simulators. Analytical models and models based on a set of tabulated data are investigated in this thesis. Two novel, h igh ly accurate and efficient interconnect simulation techniques are developed. These techniques combine model order reduction methods with either an analytical resonant model or an interconnect model generated from frequency-dependent sparameters derived from measurements or rigorous full-wave simulation. The latter part o f the thesis is concerned with envelope simulation. The complex mixture of profoundly different analog/digital parts in a modern IC gives rise to multitime signals, where a fast changing signal arising from the digital section is modulated by a slower-changing envelope signal related to the analog part. A transient analysis of such a circuit is in general very time-consuming. Therefore, specialised methods that take into account the multi-time nature o f the signal are required. To address this issue, a novel envelope simulation technique is developed. This technique combines a wavelet-based collocation method with a multi-time approach to result in a novel simulation technique that enables the desired trade-off between the required accuracy and computational efficiency in a simple and intuitive way. Furthermore, this new technique has the potential to greatly reduce the overall design cycle

Model order reduction and sensitivity analysis

The electronics industry provides the core technology for numerous industrial innovations. Progress in the area of microelectronics is highlighted by several milestones in chip technology, for example microprocessors and memory chips. The ongoing increase in performance and memory density would not have been possible without the extensive use of computer simulation techniques, especially electronic circuit simulation. The basis of the latter is formed by a sound framework of methods from the area of numerical methods. In recent years, the demands on the capabilities of circuit simulation have become even more stringent. Circuit simulators have become the core of all simulations within the electronics industry. Crosstalk effects in interconnect structures are modeled by large extracted RLC networks. Also, substrate effects that start playing a crucial role in determining the performance are modeled by extracting, again, large resistive or RC networks. New algorithms are needed to cope with such situations that are extremely crucial for designers. The complexity caused by these parasitic extractions must be reduced to facilitate the simulation of the circuit while preserving accuracy. Fortunately, highly accurate parasitic extraction is not necessary for all parts of the design. Each layout contains critical blocks or paths whose timing and performance is crucial for the overall functionality of the chip. High precision interconnect modeling must be used for these circuit parts to verify the functionality of the design. On the other hand, there is interconnect outside of critical paths which adds to the complexity but whose exact model is not necessary and can be simplified. For the critical paths a so-called sensitivity analysis can bring a major achievement in speed-up, by automatically determining the critical parasitic elements that provide the most dominant influence. Another important aspect is the fact that there is an increasing deviation between design and manufacturing. Due to the ever decreasing feature sizes in modern chips, deviations from the intended dimensions are becoming more probable. Designers need to cope with this, and design the circuits in such a way that a deviation from intended dimensions does not alter the functionality of the circuit. In order to investigate this properly, one needs to assume that all components can possibly be slightly different after manufacturing.The effects this has on the performance of the circuit can be studied by introducing many thousands or even millions of parameters, describing the deviations, and performing a sensitivity analysis of the circuit w.r.t. parameter changes. The aforementioned problems form the inspiration for the study in this thesis. Sensitivity analysis is crucial for the correctness of virtual design environments based on electronic circuit simulators, and gives designers insight in how to alter the designs in order to guarantee more robustness with respect to variability in the design. The problem is that a thorough sensitivity analysis requires derivatives of the solution with respect to a large amount of parameters. This is not feasible using classical methods, being far too time-consuming for modern circuits. Recently proposed methods using the adjoint problem to calculate sensitivities are far more efficient, and these form the basis for our methodology. Our work has concentrated on making such methods even more efficient, by mixing them with concepts from the area of model order reduction. This leads to very efficient, robust and accurate methods for sensitivity analysis, even if the underlying circuit is large and the number of parameters is excessive

Making Applications Faster by Asynchronous Execution: Slowing Down Processes or Relaxing MPI Collectives

Comprehending the performance bottlenecks at the core of the intricate hardware-software interactions exhibited by highly parallel programs on HPC clusters is crucial. This paper sheds light on the issue of automatically asynchronous MPI communication in memory-bound parallel programs on multicore clusters and how it can be facilitated. For instance, slowing down MPI processes by deliberate injection of delays can improve performance if certain conditions are met. This leads to the counter-intuitive conclusion that noise, independent of its source, is not always detrimental but can be leveraged for performance improvements. We employ phase-space graphs as a new tool to visualize parallel program dynamics. They are useful in spotting certain patterns in parallel execution that will easily go unnoticed with traditional tracing tools. We investigate five different microbenchmarks and applications on different supercomputer platforms: an MPI-augmented STREAM Triad, two implementations of Lattice-Boltzmann fluid solvers, and the LULESH and HPCG proxy applications.Comment: 18 pages, 14 figures, 7 tables. Corrected Fig. 4 layou

Delay Extraction based Macromodeling with Parallel Processing for Efficient Simulation of High Speed Distributed Networks

This thesis attempts to address the computational demands of accurate modeling of high speed distributed networks such as interconnect networks and power distribution networks. In order to do so, two different approaches towards modeling of high speed distributed networks are considered. One approach deals with cases where the physical characteristics of the network are not known and the network is characterized by its frequency domain tabulated data. Such examples include long interconnect networks described by their Y parameter data. For this class of problems, a novel delay extraction based IFFT algorithm has been developed for accurate transient response simulation. The other modeling approach is based on a detailed knowledge of the physical and electrical characteristics of the network and assuming a quasi transverse mode of propagation of the electromagnetic wave through the network. Such problems may include two dimensional (2D) and three dimensional (3D) power distribution networks with known geometry and materials. For this class of problem, a delay extraction based macromodeling approaches is proposed which has been found to be able to capture the distributed effects of the network resulting in more compact and accurate simulation compared to the state-of-the-art quasi-static lumped models. Furthermore, waveform relaxation based algorithms for parallel simulations of large interconnect networks and 2D power distribution networks is also presented. A key contribution of this body of work is the identification of naturally parallelizable and convergent iterative techniques that can divide the computational costs of solving such large macromodels over a multi-core hardware