1,010 research outputs found

    Printing of Fine Metal Electrodes for Organic Thin‐Film Transistors

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    Attributed to the excellent mechanical flexibility and compatibility with low‐cost and high‐throughput printing processes, the organic thin‐film transistor (OTFT) is a promising technology of choice for a wide range of flexible and large‐area electronics applications. Among various printing techniques, the drop‐on‐demand inkjet printing is one of the most versatile ones to form patterned electrodes with the advantages of mask‐less patterning, non‐contact, low cost, and scalability to large‐area manufacturing. However, the limited positional accuracy of the inkjet printer system and the spreading of the ink droplets on the substrate surface, which is influenced by both the ink properties and the substrate surface energy, make it difficult to obtain fine‐line morphologies and define the exact channel length as required, especially for relatively narrow‐line and short‐channel patterns. This chapter introduces the printing of uniform fine silver electrodes and down scaling of the channel length by controlling ink wetting on polymer substrate. All‐solution‐processed/printable OTFTs with short channels (<20 ”m) are also demonstrated by incorporating fine inkjet‐printed silver electrodes into a low‐voltage (<3 V) OTFT architecture. This work would provide a commercially competitive manufacturing approach to developing printable low‐voltage OTFTs for low‐power electronics applications

    Towards a More Flexible, Sustainable, Efficient and Reliable Induction Cooking: A Power Semiconductor Device Perspective

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    Esta tesis tiene como objetivo fundamental la mejora de la flexibilidad, sostenibilidad, eficiencia y fiabilidad de las cocinas de inducciĂłn por medio de la utilizaciĂłn de dispositivos semiconductores de potencia: Dentro de este marco, existe una funcionalidad que presenta un amplio rango de mejora. Se trata de la funciĂłn de multiplexaciĂłn de potencia, la cual pretende resolverse de una manera mĂĄs eficaz por medio de la sustituciĂłn de los comĂșnmente utilizados relĂ©s electromecĂĄnicos por dispositivos de estado sĂłlido. De entre todas las posibles implementaciones, se ha identificado entre las mĂĄs prometedoras a aquellas basadas en dispositivos de alta movilidad de electrones (HEMT) de Nitruro de Galio (GaN) y de aquellas basadas en Carburo de Silicio (SiC), pues presentan unas caracterĂ­sticas muy superiores a los relĂ©s a los que se pretende sustituir. Por el contrario, otras soluciones que inicialmente parecĂ­an ser muy prometedoras, como los MOSFETs de SĂșper-UniĂłn, han presentado una serie de comportamientos anĂłmalos, que han sido estudiados minuciosamente por medio de simulaciones fĂ­sicas a nivel de chip. AdemĂĄs, se analiza en distintas condiciones la capacidad en cortocircuito de dispositivos convencionalmente empleados en cocinas de inducciĂłn, como son los IGBTs, tratĂĄndose de encontrar el equilibrio entre un comportamiento robusto al tiempo que se mantienen bajas las pĂ©rdidas de potencia. Por otra parte, tambiĂ©n se estudia la robustez y fiabilidad de varios GaN HEMT de 600- 650 V tanto de forma experimental como por medio de simulaciones fĂ­sicas. Finalmente se aborda el cĂĄlculo de las pĂ©rdidas de potencia en convertidores de potencia resonantes empleando tĂ©cnicas de termografĂ­a infrarroja. Por medio de esta tĂ©cnica no solo es posible medir de forma precisa las diferentes contribuciones de las pĂ©rdidas, sino que tambiĂ©n es posible apreciar cĂłmo se distribuye la corriente a nivel de chip cuando, por ejemplo, el componente opera en modo de conmutaciĂłn dura. Como resultado, se obtiene informaciĂłn relevante relacionada con modos de fallo. AdemĂĄs, tambiĂ©n ha sido aprovechar las caracterizaciones realizadas para obtener un modelo tĂ©rmico de simulaciĂłn.This thesis is focused on addressing a more flexible, sustainable, efficient and reliable induction cooking approach from a power semiconductor device perspective. In this framework, this PhD Thesis has identified the following activities to cover such demands: In view of the growing interest for an effective power multiplexing in Induction Heating (IH) applications, improved and efficient Solid State Relays (SSRs) as an alternative to the electromechanical relays (EMRs) are deeply investigated. In this context, emerging Gallium Nitride (GaN) High‐Electron‐Mobility Transistors (GaN HEMTs) and Silicon Carbide (SiC) based devices are identified as potential candidates for the mentioned application, featuring several improved characteristics over EMRs. On the contrary, other solutions, which seemed to be very promising, resulted to suffer from anomalous behaviors; i.e. SJ MOSFETs are thoroughly analysed by electro‐thermal physical simulations at the device level. Additionally, the Short Circuit (SC) capability of power semiconductor devices employed or with potential to be used in IH appliances is also analysed. On the one hand, conventional IGBTs SC behavior is evaluated under different test conditions so that to obtain the trade‐off between ruggedness and low power losses. Moreover, ruggedness and reliability of several normally‐off 600‐650 V GaN HEMTs are deeply investigated by experimentation and physics‐based simulation. Finally, power losses calculation at die‐level is performed for resonant power converters by means of using Infrared Thermography (IRT). This method assists to determine, at the die‐level, the power losses and current distribution in IGBTs used in resonant soft‐switching power converters when functioning within or outside the Zero Voltage Switching (ZVS) condition. As a result, relevant information is obtained related to decreasing the power losses during commutation in the final application, and a thermal model is extracted for simulation purposes.<br /

    High Performance Low Voltage Power Mosfet For High-frequency Synchronous Buck Converters

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    Power management solutions such as voltage regulator (VR) mandate DC-DC converters with high power density, high switching frequency and high efficiency to meet the needs of future computers and telecom equipment. The trend towards DC-DC converters with higher switching frequency presents significant challenges to power MOSFET technology. Optimization of the MOSFETs plays an important role in improving low-voltage DC-DC converter performance. This dissertation focuses on developing and optimizing high performance low voltage power MOSFETs for high frequency applications. With an inherently large gate charge, the trench MOSFET suffers significant switching power losses and cannot continue to provide sufficient performance in high frequency applications. Moreover, the influence of parasitic impedance introduced by device packaging and PCB assembly in board level power supply designs becomes more pronounced as the output voltage continues to decrease and the nominal current continues to increase. This eventually raises the need for highly integrated solutions such as power supply in package (PSiP) or on chip (PSoC). However, it is often more desirable in some PSiP architectures to reverse the source/drain electrodes from electrical and/or thermal point of view. In this dissertation, a stacked-die Power Block PSiP architecture is first introduced to enable DC-DC buck converters with a current rating up to 40 A and a switching frequency in the MHz range. New high- and low-side NexFETs are specially designed and optimized for the new PSiP architecture to maximize its efficiency and power density. In particular, a new NexFET structure with iv its source electrode on the bottom side of the die (source-down) is designed to enable the innovative stacked-die PSiP technology with significantly reduced parasitic inductance and package footprint. It is also observed that in synchronous buck converter very fast switching of power MOSFETs sometimes leads to high voltage oscillations at the phase node of the buck converter, which may introduce additional power loss and cause EMI related problems and undesirable electrical stress to the power MOSFET. At the same time, the synchronous MOSFET plays an important role in determining the performance of the synchronous buck converter. The reverse recovery of its body diode and the Cdv/dt induced false trigger-on are two major mechanisms that impact the performance of the SyncFET. This dissertation introduces a new approach to effectively overcome the aforementioned challenges associated with the state-of-art technology. The threshold voltage of the low-side NexFET is intentionally reduced to minimize the conduction and body diode related power losses. Meanwhile, a monolithically integrated gate voltage pull-down circuitry is proposed to overcome the possible Cdv/dt induced turn-on issue inadvertently induced by the low VTH SynFET. Through extensive modeling and simulation, all these innovative concepts are integrated together in a power module and fabricated with a 0.35”m process. With all these novel device technology improvements, the new power module delivers a significant improvement in efficiency and offers an excellent solution for future high frequency, high current density DC-DC converters. Megahertz operation of a Power v Block incorporating these new device techniques is demonstrated with an excellent efficiency observed

    High_Voltage_DC_to_DC_Converter

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    The purpose of this project was to create a high voltage DC-DC converter for use in inverter applications. Extensive background research was conducted to evaluate existing inverter device functionality. Multiple prototypes were constructed to characterize losses and investigate ways to maximize efficiency. Testing of the final prototype included load testing, thermal characterization, efficiency evaluation, and noise level capture, with mixed results. Further work is required to provide closed loop control, safety shut off and low battery warnings

    An Integrated BiCMOS driver chip for medium power applications

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    The development of an integrated driver circuit intended for medium power switching applications is presented. The device contains, on one chip, CMOS digital control logic and bipolar drivers, with BiCMOS interface between the two technologies. The custom integrated circuit includes four outputs each capable of switching over 500 mA at 30 volts, at a frequency of up to 1 MHz. The development effort includes the design of the chip with its component circuits and cells. Standard cell CMOS logic gates along with drive and interface circuits were designed and characterized. An appropriate BiCMOS process was developed which utilizes an n-well based 4-micron polysilicon gate MOS technology and vertical NPNs with subcollector and double emitter implants. The chip performance specifications are evaluated with respect to technology requirements and device characteristics, and trade-offs in the design of the chip and the process are examined. Process and device modeling results are compared with the measured data, which show that the objectives of the design are successfully met for the various applications involving resistive, capacitive, and inductive loads

    Resonant Behaviour of Pulse Generators for the Efficient Drive of Optical Radiation Sources Based on Dielectric Barrier Discharges

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    Dielectric barrier discharge (DBD) excimer lamps emit vacuum-UV optical radiation. This work presents novel methods for efficiently operating DBDs with short, high-voltage pulses. Transformer-less systems utilising SiC power semiconductor switches are presented. Pulse frequencies of up to 3.1 MHz and peak inverter efficiencies of 92 % were achieved. The work encloses both mathematical backgrounds of pulsed resonant circuits and practical implementation of low-inductive power stages
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