A survey on wireless body area networks for eHealthcare systems in residential environments

The progress in wearable and implanted health monitoring technologies has strong potential to alter the future of healthcare services by enabling ubiquitous monitoring of patients. A typical health monitoring system consists of a network of wearable or implanted sensors that constantly monitor physiological parameters. Collected data are relayed using existing wireless communication protocols to the base station for additional processing. This article provides researchers with information to compare the existing low-power communication technologies that can potentially support the rapid development and deployment of WBAN systems, and mainly focuses on remote monitoring of elderly or chronically ill patients in residential environments

POWER REDUCTION BY DYNAMICALLY VARYING SAMPLING RATE

In modern digital audio applications, a continuous audio signal stream is sampled at a fixed sampling rate, which is always greater than twice the highest frequency of the input signal, to prevent aliasing. A more energy efficient approach is to dynamically change the sampling rate based on the input signal. In the dynamic sampling rate technique, fewer samples are processed when there is little frequency content in the samples. The perceived quality of the signal is unchanged in this technique. Processing fewer samples involves less computation work; therefore processor speed and voltage can be reduced. This reduction in processor speed and voltage has been shown to reduce power consumption by up to 40% less than if the audio stream had been run at a fixed sampling rate

Digital Signal Processing with Signal-Derived Timing: Analysis and Implementation

This work investigates two different digital signal processing (DSP) approaches that rely on signal-derived timing: continuous-time (CT) DSP and variable-rate DSP. Both approaches enable designs of energy-efficient signal processing systems by relating their operation rates to the input activity. The majority of this thesis focuses on CT-DSP, whose operations are completely digital in CT, without the use of a clock. The spectral features of CT digital signals are analyzed first, demonstrating a general pattern of the quantization noise spectrum added in CT amplitude quantization. Then the focus is narrowed to the investigations of the system characteristics and architecture of CT digital infinite-impulse-response (IIR) filters, which are barely studied in the previous work on this topic. This thesis discusses and addresses previously unreported stability issue in CT digital IIR filters with the presence of delay-line mismatches and proposes an innovative method to design high-order CT digital IIR filters with only two tap delays. Introducing an event detector allows the operation rate of a CT digital IIR filter to closely track the input activity even though it is a feedback system. For the first time, the filtered CT digital signal is converted to a synchronous digital signal. This facilitates integrating the CT digital filter and conventional discrete-time systems and expands the applications of the former. This discussion uses a computationally efficient interpolation filter to improve the signal accuracy of the synchronous digital output. On the circuit level, a new delay-cell design is introduced. It ensures low jitter, good matching, robust communication with adjacent circuits and event-independent delay. An integrated circuit (IC) with all these ideas adopted was fabricated in a TSMC 65 nm LP CMOS process. It is the first IC implementation of a CT digital IIR filter. It can process signals with a data rate up to 20 MHz. Thanks to the IIR response and the 16-bit resolution used in the system, the implemented filter can achieve a frequency response much more versatile and accurate than the CT digital filters in prior art. The implemented system features an agile power adaptive to input activity, varying from 2.32mW (full activity) to 40μW (idle) with no power-management circuitry. The second part of the thesis discusses a variable-rate DSP capable of processing samples with a variable sampling rate. The clock rate in the variable-rate DSP tracks the input sampling rate. Compared to a fixed-rate DSP, the proposed system has a lower output data rate and hence is more computationally efficient. A reconstruction filter with a variable cutoff frequency is used to reconstruct the output. The signal-to-noise ratio remains fixed when the sampling rate changes

Enhanced receiver architectures for processing multi GNSS signals in a single chain : based on partial differential equations mathematical model

The focus of our research is on designing a new architecture (RF front-end and digital) for processing multi GNSS signals in a single receiver chain. The motivation is to save in overhead cost (size, processing time and power consumption) of implementing multiple signal receivers side-by-side on-board Smartphones. This thesis documents the new multi-signal receiver architecture that we have designed. Based on this architecture, we have achieved/published eight novel contributions. Six of these implementations focus on multi GNSS signal receivers, and the last two are for multiplexing Bluetooth and GPS received signals in a single processing chain. We believe our work in terms of the new innovative and novel techniques achieved is a major contribution to the commercial world especially that of Smartphones. Savings in both silicon size and processing time will be highly beneficial to reduction of costs but more importantly for conserving the energy of the battery. We are proud that we have made this significant contribution to both industry and the scientific research and development arena. The first part of the work focus on the Two GNSS signal detection front-end approaches that were designed to explore the availability of the L1 band of GPS, Galileo and GLONASS at an early stage. This is so that the receiver devotes appropriate resources to acquire them. The first approach was based on folding the carrier frequency of all the three GNSS signals with their harmonics to the First Nyquist Zone (FNZ), as depicted by the BandPass Sampling Receiver technique (BPSR). Consequently, there is a unique power distribution of these folded signals based on the actual present signals that can be detected to alert the digital processing parts to acquire it. Volterra Series model is used to estimate the existing power in the FNZ by extracting the kernels of these folded GNSS signals, if available. The second approach filters out the right-side lobe of the GLONASS signal and the left-side lobe of the Galileo signal, prior to the folding process in our BPSR implementation. This filtering is important to enable none overlapped folding of these two signals with the GPS signal in the FNZ. The simulation results show that adopting these two approaches can save much valuable acquisition processing time. Our Orthogonal BandPass Sampling Receiver and Orthogonal Complex BandPass Sampling Receiver are two methods designed to capture any two wireless signals simultaneously and use a single channel in the digital domain to process them, including tracking and decoding, concurrently. The novelty of the two receivers is centred on the Orthogonal Integrated Function (OIF) that continuously harmonies the two received signals to form a single orthogonal signal allowing the “tracking and decoding” to be carried out by a single digital channel. These receivers employ a Hilbert Transform for shifting one of the input signals by 90-degrees. Then, the BPSR technique is used to fold back the two received signals to the same reference frequency in the FNZ. Results show that these designed methods also reduce the sampling frequency to a rate proportional to the maximum bandwidth, instead of the summation of bandwidths, of the input signals. Two combined GPS L1CA and L2C signal acquisition channels are designed based on applying the idea of the OIF to enhance the power consumption and the implementation complexity in the existing combination methods and also to enhance the acquisition sensitivity. This is achieved by removing the Doppler frequency of the two signals; our methods add the in-phase component of the L2C signal together with the in-phase component of the L1CA signal, which is then shifted by 90-degree before adding it to the remaining components of these two signals, resulting in an orthogonal form of the combined signals. This orthogonal signal is then fed to our developed version of the parallel-code-phase-search engine. Our simulation results illustrate that the acquisition sensitivity of these signals is improved successfully by 5.0 dB, which is necessary for acquiring weak signals in harsh environments. The last part of this work focuses on the tracking stage when specifically multiplexing Bluetooth and L1CA GPS signals in a single channel based on using the concept of the OIF, where the tracking channel can be shared between the two signals without losing the lock or degrading its performance. Two approaches are designed for integrating the two signals based on the mathematical analysis of the main function of the tracking channel, which the Phase-Locked Loop (PLL). A mathematical model of a set of differential equations has been developed to evaluate the PLL when it used to track and demodulated two signals simultaneously. The simulation results proved that the implementation of our approaches has reduced by almost half the size and processing time

Robust Audio and WiFi Sensing via Domain Adaptation and Knowledge Sharing From External Domains

Recent advancements in machine learning have initiated a revolution in embedded sensing and inference systems. Acoustic and WiFi-based sensing and inference systems have enabled a wide variety of applications ranging from home activity detection to health vitals monitoring. While many existing solutions paved the way for acoustic event recognition and WiFi-based activity detection, the diverse characteristics in sensors, systems, and environments used for data capture cause a shift in the distribution of data and thus results in sub-optimal classification performance when the sensor and environment discrepancy occurs between training and inference stage. Moreover, large-scale acoustic and WiFi data collection is non-trivial and cumbersome. Therefore, current acoustic and WiFi-based sensing systems suffer when there is a lack of labeled samples as they only rely on the provided training data. In this thesis, we aim to address the performance loss of machine learning-based classifiers for acoustic and WiFi-based sensing systems due to sensor and environment heterogeneity and lack of labeled examples. We show that discovering latent domains (sensor type, environment, etc.) and removing domain bias from machine learning classifiers make acoustic and WiFi-based sensing robust and generalized. We also propose a few-shot domain adaptation method that requires only one labeled sample for a new domain that relieves the users and developers from the painstaking task of data collection at each new domain. Furthermore, to address the lack of labeled examples, we propose to exploit the information or learned knowledge from sources where available data already exists in volumes, such as textual descriptions and visual domain. We implemented our algorithms in mobile and embedded platforms and collected data from participants to evaluate our proposed algorithms and frameworks in an extensive manner.Doctor of Philosoph

Optimizing Constrainted Concurrent Applications at Run-time

Computer systems are resource constrained. Application adaptation is a useful way to optimize system resource usage while satisfying an application’s performance requirements. Current multicore computer systems supporting these applications, however, are not designed to reliably meet these requirements. Meanwhile, these computer systems are resource-limited, e.g., have power-induced energy and thermal constraints. Compounding the application’s performance requirements are increasingly-stringent microprocessor thermal constraints. Previous application adaptation efforts, however, were ad-hoc, time-consuming, and highly application-specific, with limited portability between computer systems. This thesis presents OCCAM, a software platform for developing multicore adaptable applications. OCCAM’s design-time platform consists of design patterns, APIs, and data structures that allow application developers to specify the performance constraints and application-specific optimization techniques. OCCAM generates a run-time controller offline, using profiling data. It then uses this profiling data to generate an internal model that it subsequently employs to generate a robust Markov Decision Process-based Model Predictive Controller. Using a set of Recognition, Mining, and Synthesis benchmarks, the experimental study demonstrates that OCCAM can successfully optimize the system while meeting the systems performance requirements across a wide range of computer platforms, ranging from an energy-constrained single-core system to a high-performance 16-core system. Finally, OCCAM presents a simulation-based, stochastic model checking-based framework for quantifying the robustness of the controller

Signal Encoding and Digital Signal Processing in Continuous Time

This work investigates signal encoding in, and architectures of, digital signal processing systems that function in continuous time (CT). Unlike conventional digital signal processors (DSPs), which rely on a clock to dictate the sampling times of an analog-to-digital converter (ADC) and to provide the tap delay timing, CT DSPs function entirely in continuous time, without a sampling or a synchronizing clock. The samples of a CT DSP system are generated and processed only when some measure of the input signal crosses a predetermined threshold. The effective sampling rate and the dynamic power dissipation of a CT digital system automatically adapt to the activity of the input signal. The properties of signals sampled in continuous time are investigated in this thesis. A technique for reducing the effective sampling rate of a CT system is presented, in which the digital signal encoding is varied by adjusting the resolution according to a property of the input. A variable-resolution system leads to a decrease in the number of samples generated, a reduction in the power dissipation and a reduction in the effective chip area of a CT DSP, all without sacrificing in-band performance. The properties of several asynchronous signal-driven sampling techniques are analyzed and compared. The architecture and signal encoding of CT DSPs for signals in the lower gigahertz frequency range are investigated, with consideration of speed and accuracy limitations in the context of submicron CMOS technologies. A per-edge digital signal encoding technique is developed, which bypasses timing problems of processing high-speed digital signals; the properties of per-edge encoded signals are discussed. The design considerations of a low-resolution per-edge-encoded gigahertz-range CT DSP are discussed and an implementation for a possible application is detailed. A prototype chip has been fabricated in ST 65 nm CMOS technology, which has a compact processor core area of 0.073 mm^2. The implemented CT digital processor achieves SNDR of over 20 dB with 3 bits of resolution and a maximum usable -3 dB bandwidth of 0.8 GHz to 3.2 GHz. The processor can be configured as a one-tap to six-tap CT FIR filter and has an active power dissipation that varies from 0.27 mW to 9.5 mW, depending on the amplitude and frequency of the input signal

MAC/PHY Co-Design of CSMA Wireless Networks Using Software Radios.

In the past decade, CSMA-based protocols have spawned numerous network standards (e.g., the WiFi family), and played a key role in improving the ubiquity of wireless networks. However, the rapid evolution of CSMA brings unprecedented challenges, especially the coexistence of different network architectures and communications devices. Meanwhile, many intrinsic limitations of CSMA have been the main obstacle to the performance of its derivatives, such as ZigBee, WiFi, and mesh networks. Most of these problems are observed to root in the abstract interface of the CSMA MAC and PHY layers --- the MAC simply abstracts the advancement of PHY technologies as a change of data rate. Hence, the benefits of new PHY technologies are either not fully exploited, or they even may harm the performance of existing network protocols due to poor interoperability. In this dissertation, we show that a joint design of the MAC/PHY layers can achieve a substantially higher level of capacity, interoperability and energy efficiency than the weakly coupled MAC/PHY design in the current CSMA wireless networks. In the proposed MAC/PHY co-design, the PHY layer exposes more states and capabilities to the MAC, and the MAC performs intelligent adaptation to and control over the PHY layer. We leverage the reconfigurability of software radios to design smart signal processing algorithms that meet the challenge of making PHY capabilities usable by the MAC layer. With the approach of MAC/PHY co-design, we have revisited the primitive operations of CSMA (collision avoidance, carrier signaling, carrier sensing, spectrum access and transmitter cooperation), and overcome its limitations in relay and broadcast applications, coexistence of heterogeneous networks, energy efficiency, coexistence of different spectrum widths, and scalability for MIMO networks. We have validated the feasibility and performance of our design using extensive analysis, simulation and testbed implementation.PHDComputer Science & EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/95944/1/xyzhang_1.pd