78,859 research outputs found

    Preliminary Results on 3D Channel Modeling: From Theory to Standardization

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    Three dimensional beamforming (3D) (also elevation beamforming) is now gaining a growing interest among researchers in wireless communication. The reason can be attributed to its potential to enable a variety of strategies like sector or user specific elevation beamforming and cell-splitting. Since these techniques cannot be directly supported by current LTE releases, the 3GPP is now working on defining the required technical specifications. In particular, a large effort is currently made to get accurate 3D channel models that support the elevation dimension. This step is necessary as it will evaluate the potential of 3D and FD(Full Dimensional) beamforming techniques to benefit from the richness of real channels. This work aims at presenting the on-going 3GPP study item "Study on 3D-channel model for Elevation Beamforming and FD-MIMO studies for LTE", and positioning it with respect to previous standardization works

    A case study for NoC based homogeneous MPSoC architectures

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    The many-core design paradigm requires flexible and modular hardware and software components to provide the required scalability to next-generation on-chip multiprocessor architectures. A multidisciplinary approach is necessary to consider all the interactions between the different components of the design. In this paper, a complete design methodology that tackles at once the aspects of system level modeling, hardware architecture, and programming model has been successfully used for the implementation of a multiprocessor network-on-chip (NoC)-based system, the NoCRay graphic accelerator. The design, based on 16 processors, after prototyping with field-programmable gate array (FPGA), has been laid out in 90-nm technology. Post-layout results show very low power, area, as well as 500 MHz of clock frequency. Results show that an array of small and simple processors outperform a single high-end general purpose processo

    In-body path loss models for implants in heterogeneous human tissues using implantable slot dipole conformal flexible antennas

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    A wireless body area network (WBAN) consists of a wireless network with devices placed close to, attached on, or implanted into the human body. Wireless communication within a human body experiences loss in the form of attenuation and absorption. A path loss model is necessary to account for these losses. In this article, path loss is studied in the heterogeneous anatomical model of a 6-year male child from the Virtual Family using an implantable slot dipole conformal flexible antenna and an in-body path loss model is proposed at 2.45 GHz with application to implants in a human body. The model is based on 3D electromagnetic simulations and is compared to models in a homogeneous muscle tissue medium

    Building Blocks for Control System Software

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    Software implementation of control laws for industrial systems seem straightforward, but is not. The computer code stemming from the control laws is mostly not more than 10 to 30% of the total. A building-block approach for embedded control system development is advocated to enable a fast and efficient software design process.\ud We have developed the CTJ library, Communicating Threads for JavaÂż,\ud resulting in fundamental elements for creating building blocks to implement communication using channels. Due to the simulate-ability, our building block method is suitable for a concurrent engineering design approach. Furthermore, via a stepwise refinement process, using verification by simulation, the implementation trajectory can be done efficiently
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