Evolvable Smartphone-Based Platforms for Point-Of-Care In-Vitro Diagnostics Applications

The association of smart mobile devices and lab-on-chip technologies offers unprecedented opportunities for the emergence of direct-to-consumer in vitro medical diagnostics applications. Despite their clear transformative potential, obstacles remain to the large-scale disruption and long-lasting success of these systems in the consumer market. For instance, the increasing level of complexity of instrumented lab-on-chip devices, coupled to the sporadic nature of point-of-care testing, threatens the viability of a business model mainly relying on disposable/consumable lab-on-chips. We argued recently that system evolvability, defined as the design characteristic that facilitates more manageable transitions between system generations via the modification of an inherited design, can help remedy these limitations. In this paper, we discuss how platform-based design can constitute a formal entry point to the design and implementation of evolvable smart device/lab-on-chip systems. We present both a hardware/software design framework and the implementation details of a platform prototype enabling at this stage the interfacing of several lab-on-chip variants relying on current- or impedance-based biosensors. Our findings suggest that several change-enabling mechanisms implemented in the higher abstraction software layers of the system can promote evolvability, together with the design of change-absorbing hardware/software interfaces. Our platform architecture is based on a mobile software application programming interface coupled to a modular hardware accessory. It allows the specification of lab-on-chip operation and post-analytic functions at the mobile software layer. We demonstrate its potential by operating a simple lab-on-chip to carry out the detection of dopamine using various electroanalytical methods

Modeling and Verification for Timing Satisfaction of Fault-Tolerant Systems with Finiteness

The increasing use of model-based tools enables further use of formal verification techniques in the context of distributed real-time systems. To avoid state explosion, it is necessary to construct verification models that focus on the aspects under consideration. In this paper, we discuss how we construct a verification model for timing analysis in distributed real-time systems. We (1) give observations concerning restrictions of timed automata to model these systems, (2) formulate mathematical representations on how to perform model-to-model transformation to derive verification models from system models, and (3) propose some theoretical criteria how to reduce the model size. The latter is in particular important, as for the verification of complex systems, an efficient model reflecting the properties of the system under consideration is equally important to the verification algorithm itself. Finally, we present an extension of the model-based development tool FTOS, designed to develop fault-tolerant systems, to demonstrate %the benefits of our approach.Comment: 1. Appear in the 13-th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications (DS-RT'09). 2. Compared to the DS-RT version, we add motivations for editing automata, and footnote that the sketch of editing algo is only applicable in our job-processing element to avoid ambiguity (because actions are chained

Contribution à la modélisation explicite des plates-formes d'exécution pour l'IDM

23 pagesNational audienceOne foundation of the model driven engineering (MDE) is to separate the modelling application description from its technological implementation (i.e. platform). Some of them are dedicated to the system execution. Hence, one promise solution of the MDE is to automate transformations from platform independent models to platform specific models. Little work has explicitly described platform characteristics. Yet, an explicit modelling allows taking in account their characteristics more easily (par ex., performances, maintainability,portability). This paper presents both an execution platform modelling state of art and a pattern to describe execution platform modelling framework. It intends to confirm the feasibility and the interests in describing an execution platform metamodel

Sistem Aplikasi Absensi Menggunakan Teknologi Barcode Scanner Berbasis Android

Absensi merupakan salah satu instrument yang sangat penting dalam penyelenggaraan perkuliahan. Oleh karena itu, dibutuhkan pengawasan yang baik mengenai absensi kehadiran mahasiswa, absensi dapat dijadikan sebagai salah satu tolak ukur seorang mahasiswa terhadap antusias keikutsertaanya dalam perkuliahan. Penyelenggaraan Pendidikan pada Kampus Amik Mahaputra Riau juga menerapkan sistem absensi pada jadwal perkuliahan, dimana absensi mahasiswa masih menggunakan metode tanda tangan pada lembaran absen yang dibagikan pada setiap perkuliahan. Kelemahan dalam penerapan absensi dengan metode manual ini sering terjadi kecurangan titip absen, mahasiswa yang lupa mengisi absen sehingga terjadi kesalahan, serta tidak efisien karena butuh waktu lama dalam perekapan data dari absensi manual. Aplikasi Absen dengan Barcode merupakan solusi yang memanfaatkan Teknologi Informasi Mobile yang mampu menangani permasalahan selama proses absensi dan dapat mengakomodir proses perekaman data absensi, sehingga proses rekapitulasi dapat dilakukan lebih cepat dan akurat. Proses absensi dapat dilakukan dengan menscan kode Barcode yang telah dipersiapkan oleh Admin dalam hal ini BAAK, dalam bentuk card  menggunakan aplikasi yang telah diinstal pada smartphone, selanjutnya mahasiswa akan menscan Barcode menggunakan Aplikasi absensi yang di instal pada Smartphone, kemudian data absensi dikirimkan ke database. Penerapkan absensi menggunakan barcode scanner berbasis android menjadi solusi dalam pemecahan masalah pengelolaan data absensi dan memiliki keunggulan dapat melakukan pengambilan absensi dengan cepat, tepat dan akurat, sehingga monitoring pelaksanaan dan pengelolaan absensi dapat dilakukan secara praktis dan efisien

Managing risks and opportunities in cyber-physical systems with software architecture assessments

Peer reviewe

Using Physical Compilation to Implement a System on Chip Platform

The goal of this thesis was to setup a complete design flow involving physical synthesis. The design chosen for this purpose was a system-on-chip (SoC) platform developed at the University of Tennessee. It involves a Leon Processor with a minimal cache configuration, an AMBA on-chip bus and an Advanced Encryption Standard module which performs decryption. As transistor size has entered the deep submicron level, iterations involved in the design cycle have increased due to the domination of interconnect delays over cell delays. Traditionally, interconnect delay has been estimated through the use of wire-load models. However, since there is no physical placement information, the delay estimation may be ineffective and result in increased iterations. Hence, placement-based synthesis has recently been introduced to provide better interconnect delay estimation. The tool used in this thesis to implement the system-on-chip design using physical synthesis is Synopsys Physical Compiler. The flow has been setup through the use of the Galaxy Reference Flow scripts obtained from Synopsys. As part of the thesis, an analysis of the differences between a physically synthesized design and a logically synthesized one in terms of area and delay is presented

Secure Platform Over Wireless Sensor Networks

Life sciences: general issue