168 research outputs found

    차세대 자동차용 카메라 데이터 통신을 위한 비대칭 동시 양방향 송수신기의 설계

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    학위논문(박사) -- 서울대학교대학원 : 공과대학 전기·정보공학부, 2022.2. 정덕균.본 학위 논문에서는 차세대 자동차용 카메라 링크를 위해 높은 속도의 4레벨 펄스 진폭 변조 신호와 낮은 속도의 2레벨 펄스 진폭 변조 신호를 통신하는 비대칭 동시 양방향 송수신기의 설계 기술에 대해 제안하고 검증되었다. 첫번째 프로토타입 설계에서는, 10B6Q 직류 밸런스 코드를 탑재한 4레벨 펄스 진폭 변조 송신기와 고정된 데이터와 참조 레벨을 가지는 4레벨 펄스 진폭 변조 적응형 수신기에 대한 내용이 기술되었다. 4레벨 펄스 진폭 변조 송신기에서는 교류 연결 링크 시스템에 대응하기 위한 면적 및 전력 효율성이 좋은 10B6Q 코드가 제안되었다. 이 코드는 직류 밸런스를 맞추고 연속적으로 같은 심볼을 가지는 길이를 6개로 제한 시킨다. 비록 여기서는 입력 데이터 길이 10비트를 사용하였지만, 제안된 기술은 카메라의 다양한 데이터 타입에 대응할 수 있도록 입력 데이터 길이에 대한 확장성을 가진다. 반면, 4레벨 펄스 진폭 변조 적응형 수신기에서는, 샘플러의 옵셋을 최적으로 제거하여 더 낮은 비트에러율을 얻기 위해서, 기존의 데이터 및 참조 레벨을 조절하는 대신, 이 레벨들은 고정시키고 가변 게인 증폭기를 적응형으로 조절하도록 하였다. 상기 10B6Q 코드 및 고정 데이터 및 참조레벨 기술을 가진 프로토타입 칩들은 40 나노미터 상호보완형 메탈 산화 반도체 공정으로 제작되었고 칩 온 보드 형태로 평가되었다. 10B6Q 코드는 합성 게이트 숫자는 645개와 함께 단 0.0009 mm2 의 면적 만을 차지한다. 또한, 667 MHz 동작 주파수에서 단 0.23 mW 의 전력을 소모한다. 10B6Q 코드를 탑재한 송신기에서 8-Gb/s 4레벨 펄스 진폭 변조 신호를 고정 데이터 및 참조 레벨을 가지는 적응형 수신기로 12-m 케이블 (22-dB 채널 로스) 을 통해서 보낸 결과 최소 비트 에러율 108 을 달성하였고, 비트 에러율 105 에서는 아이 마진이 0.15 UI x 50 mV 보다 크게 측정되었다. 송수신기를 합친 전력 소모는 65.2 mW (PLL 제외) 이고, 성과의 대표수치는 0.37 pJ/b/dB 를 보여주었다. 첫번째 프로토타입 설계을 포함하여 개선된 두번째 프로토타입 설계에서는, 12-Gb/s 4레벨 펄스 진폭 변조 정방향 채널 신호와 125-Mb/s 2레벨 펄스 진폭 변조 역방향 채널 신호를 탑재한 비대칭 동시 양방향 송수신기에 대해 기술되고 검증되었다. 제안된 넓은 선형 범위를 가지는 하이브리드는 gmC 저대역 통과 필터와 에코 제거기와 함께 아웃바운드 신호를 24 dB 이상 효율적으로 감소시켰다. 또한, 넓은 선형 범위를 가지는 하이브리드와 함께 게인 감소기를 형성하게 되는 선형 범위 증폭기를 통해 4레벨 펄스 진폭 변조 신호의 선형성과 진폭의 트레이드 오프 관계를 깨는 것이 가능하였다. 동시 양방향 송수신기 칩은 40 나노미터 상호보완형 메탈 산화 반도체 공정으로 제작되었다. 상기 설계 기술들을 이용하여, 4레벨 펄스 진폭 변조 및 2레벨 펄스 진폭 변조 송수신기 모두 5m 채널 (채널 로스 15.9 dB) 에서 1E-12 보다 낮은 비트 에러율을 달성하였고, 총 78.4 mW 의 전력 소모를 기록하였다. 종합적인 송수신기는 성과 대표지표로 0.41 pJ/b/dB 와 함께 동시 양방향 통신 아래에서 4레벨 펄스 진폭 변조 신호 및 2레벨 펄스 진폭 변조 신호 각각에서 아이 마진 0.15 UI 와 0.57 UI 를 달성하였다. 이 수치는 성과 대표지표 0.5 이하를 가지는 기존 동시 양방향 송수신기와의 비교에서 최고의 아이 마진을 기록하였다.In this dissertation, design techniques of a highly asymmetric simultaneous bidirectional (SB) transceivers with high-speed PAM-4 and low-speed PAM-2 signals are proposed and demonstrated for the next-generation automotive camera link. In a first prototype design, a PAM-4 transmitter with 10B6Q DC balance code and a PAM-4 adaptive receiver with fixed data and threshold levels (dtLevs) are presented. In PAM-4 transmitter, an area- and power-efficient 10B6Q code for an AC coupled link system that guarantees DC balance and limited run length of six is proposed. Although the input data width of 10 bits is used here, the proposed scheme has an extensibility for the input data width to cover various data types of the camera. On the other hand, in the PAM-4 adaptive receiver, to optimally cancel the sampler offset for a lower BER, instead of adjusting dtLevs, the gain of a programmable gain amplifier is adjusted adaptively under fixed dtLevs. The prototype chips including above proposed 10B6Q code and fixed dtLevs are fabricated in 40-nm CMOS technology and tested in chip-on-board assembly. The 10B6Q code only occupies an active area of 0.0009 mm2 with a synthesized gate count of 645. It also consumes 0.23 mW at the operating clock frequency of 667 MHz. The transmitter with 10B6Q code delivers 8-Gb/s PAM-4 signal to the adaptive receiver using fixed dtLevs through a lossy 12-m cable (22-dB channel loss) with a BER of 1E-8, and the eye margin larger than 0.15 UI x 50 mV is measured for a BER of 1E-5. The proto-type chips consume 65.2 mW (excluding PLL), exhibiting an FoM of 0.37 pJ/b/dB. In a second prototype design advanced from the first prototypes, An asymmetric SB transceivers incorporating a 12-Gb/s PAM-4 forward channel and a 125-Mb/s PAM-2 back channel are presented and demonstrated. The proposed wide linear range (WLR) hybrid combined with a gmC low-pass filter and an echo canceller effectively suppresses the outbound signals by more than 24dB. In addition, linear range enhancer which forms a gain attenuator with WLR hybrid breaks the trade-off between the linearity and the amplitude of the PAM-4 signal. The SB transceiver chips are separately fabricated in 40-nm CMOS technology. Using above design techniques, both PAM-4 and PAM-2 SB transceivers achieve BER less than 1E-12 over a 5-m channel (15.9 dB channel loss), consuming 78.4 mW. The overall transceivers achieve an FoM of 0.41 pJ/b/dB and eye margin (at BER of 1E-12) of 0.15 UI and 0.57 UI for the forward PAM-4 and back PAM-2 signals, respectively, under SB communication. This is the best eye margin compared to the prior art SB transceivers with an FoM less than 0.5.CHAPTER 1 INTRODUCTION 1 1.1 MOTIVATION 1 1.2 DISSERTATION ORGANIZATION 4 CHAPTER 2 BACKGROUND ON AUTOMOTIVE CAMERA LINK 6 2.1 OVERVIEW 6 2.2 SYSTEM REQUIREMENTS 10 2.2.1 CHANNEL 10 2.2.2 POWER OVER DIFFERENTIAL LINE (PODL) 12 2.2.3 AC COUPLING AND DC BALANCE CODE 15 2.2.4 SIMULTANEOUS BIDIRECTIONAL COMMUNICATION 18 2.2.4.1 HYBRID 18 2.2.4.2 ECHO CANCELLER 20 2.2.5 ADAPTIVE RECEIVE EQUALIZATION 22 CHAPTER 3 AREA AND POWER EFFICIENT 10B6Q ENCODER FOR DC BALANCE 25 3.1 INTRODUCTION 25 3.2 PRIOR WORKS 28 3.3 PROPOSED AREA- AND POWER-EFFICIENT 10B6Q PAM-4 CODER 30 3.4 DESIGN OF THE 10B6Q CODE 33 3.4.1 PAM-4 DC BALANCE 35 3.4.2 PAM-4 TRANSITION DENSITY 35 3.4.3 10B6Q DECODER 37 3.5 IMPLEMENTATION AND MEASUREMENT RESULTS 40 CHAPTER 4 PAM-4 TRANSMITTER AND ADAPTIVE RECEIVER WITH FIXED DATA AND THRESHOLD LEVELS 45 4.1 INTRODUCTION 45 4.2 PRIOR WORKS 47 4.3 ARCHITECTURE AND IMPLEMENTATION 49 4.2.1 PAM-4 TRANSMITTER 49 4.2.2 PAM-4 ADAPTIVE RECEIVER 52 4.3 MEASUREMENT RESULTS 62 CHAPTER 5 ASYMMETRIC SIMULTANEOUS BIDIRECTIONAL TRANSCEIVERS USING WIDE LINEAR RANGE HYBRID 68 5.1 INTRODUCTION 68 5.2 PRIOR WORKS 70 5.3 WIDE LINEAR RANGE (WLR) HYBRID 75 5.3 IMPLEMENTATION 78 5.3.1 SERIALIZER (SER) DESIGN 78 5.3.2 DESERIALIZER (DES) DESIGN 79 5.4 HALF CIRCUIT ANALYSIS OF WLR HYBRID AND LRE 82 5.5 MEASUREMENT RESULTS 88 CHAPTER 6 CONCLUSION 97 BIBLIOGRAPHY 99 초 록 106박

    Energy-Efficient Wireless Circuits and Systems for Internet of Things

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    As the demand of ultra-low power (ULP) systems for internet of thing (IoT) applications has been increasing, large efforts on evolving a new computing class is actively ongoing. The evolution of the new computing class, however, faced challenges due to hard constraints on the RF systems. Significant efforts on reducing power of power-hungry wireless radios have been done. The ULP radios, however, are mostly not standard compliant which poses a challenge to wide spread adoption. Being compliant with the WiFi network protocol can maximize an ULP radio’s potential of utilization, however, this standard demands excessive power consumption of over 10mW, that is hardly compatible with in ULP systems even with heavy duty-cycling. Also, lots of efforts to minimize off-chip components in ULP IoT device have been done, however, still not enough for practical usage without a clean external reference, therefore, this limits scaling on cost and form-factor of the new computer class of IoT applications. This research is motivated by those challenges on the RF systems, and each work focuses on radio designs for IoT applications in various aspects. First, the research covers several endeavors for relieving energy constraints on RF systems by utilizing existing network protocols that eventually meets both low-active power, and widespread adoption. This includes novel approaches on 802.11 communication with articulate iterations on low-power RF systems. The research presents three prototypes as power-efficient WiFi wake-up receivers, which bridges the gap between industry standard radios and ULP IoT radios. The proposed WiFi wake-up receivers operate with low power consumption and remain compatible with the WiFi protocol by using back-channel communication. Back-channel communication embeds a signal into a WiFi compliant transmission changing the firmware in the access point, or more specifically just the data in the payload of the WiFi packet. With a specific sequence of data in the packet, the transmitter can output a signal that mimics a modulation that is more conducive for ULP receivers, such as OOK and FSK. In this work, low power mixer-first receivers, and the first fully integrated ultra-low voltage receiver are presented, that are compatible with WiFi through back-channel communication. Another main contribution of this work is in relieving the integration challenge of IoT devices by removing the need for external, or off-chip crystals and antennas. This enables a small form-factor on the order of mm3-scale, useful for medical research and ubiquitous sensing applications. A crystal-less small form factor fully integrated 60GHz transceiver with on-chip 12-channel frequency reference, and good peak gain dual-mode on-chip antenna is presented.PHDElectrical and Computer EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/162975/1/jaeim_1.pd

    Millimeter-wave Wireless LAN and its Extension toward 5G Heterogeneous Networks

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    Millimeter-wave (mmw) frequency bands, especially 60 GHz unlicensed band, are considered as a promising solution for gigabit short range wireless communication systems. IEEE standard 802.11ad, also known as WiGig, is standardized for the usage of the 60 GHz unlicensed band for wireless local area networks (WLANs). By using this mmw WLAN, multi-Gbps rate can be achieved to support bandwidth-intensive multimedia applications. Exhaustive search along with beamforming (BF) is usually used to overcome 60 GHz channel propagation loss and accomplish data transmissions in such mmw WLANs. Because of its short range transmission with a high susceptibility to path blocking, multiple number of mmw access points (APs) should be used to fully cover a typical target environment for future high capacity multi-Gbps WLANs. Therefore, coordination among mmw APs is highly needed to overcome packet collisions resulting from un-coordinated exhaustive search BF and to increase the total capacity of mmw WLANs. In this paper, we firstly give the current status of mmw WLANs with our developed WiGig AP prototype. Then, we highlight the great need for coordinated transmissions among mmw APs as a key enabler for future high capacity mmw WLANs. Two different types of coordinated mmw WLAN architecture are introduced. One is the distributed antenna type architecture to realize centralized coordination, while the other is an autonomous coordination with the assistance of legacy Wi-Fi signaling. Moreover, two heterogeneous network (HetNet) architectures are also introduced to efficiently extend the coordinated mmw WLANs to be used for future 5th Generation (5G) cellular networks.Comment: 18 pages, 24 figures, accepted, invited paper

    Low-power CMOS digital-pixel Imagers for high-speed uncooled PbSe IR applications

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    This PhD dissertation describes the research and development of a new low-cost medium wavelength infrared MWIR monolithic imager technology for high-speed uncooled industrial applications. It takes the baton on the latest technological advances in the field of vapour phase deposition (VPD) PbSe-based medium wavelength IR (MWIR) detection accomplished by the industrial partner NIT S.L., adding fundamental knowledge on the investigation of novel VLSI analog and mixed-signal design techniques at circuit and system levels for the development of the readout integrated device attached to the detector. The work supports on the hypothesis that, by the use of the preceding design techniques, current standard inexpensive CMOS technologies fulfill all operational requirements of the VPD PbSe detector in terms of connectivity, reliability, functionality and scalability to integrate the device. The resulting monolithic PbSe-CMOS camera must consume very low power, operate at kHz frequencies, exhibit good uniformity and fit the CMOS read-out active pixels in the compact pitch of the focal plane, all while addressing the particular characteristics of the MWIR detector: high dark-to-signal ratios, large input parasitic capacitance values and remarkable mismatching in PbSe integration. In order to achieve these demands, this thesis proposes null inter-pixel crosstalk vision sensor architectures based on a digital-only focal plane array (FPA) of configurable pixel sensors. Each digital pixel sensor (DPS) cell is equipped with fast communication modules, self-biasing, offset cancellation, analog-to-digital converter (ADC) and fixed pattern noise (FPN) correction. In-pixel power consumption is minimized by the use of comprehensive MOSFET subthreshold operation. The main aim is to potentiate the integration of PbSe-based infra-red (IR)-image sensing technologies so as to widen its use, not only in distinct scenarios, but also at different stages of PbSe-CMOS integration maturity. For this purpose, we posit to investigate a comprehensive set of functional blocks distributed in two parallel approaches: • Frame-based “Smart” MWIR imaging based on new DPS circuit topologies with gain and offset FPN correction capabilities. This research line exploits the detector pitch to offer fully-digital programmability at pixel level and complete functionality with input parasitic capacitance compensation and internal frame memory. • Frame-free “Compact”-pitch MWIR vision based on a novel DPS lossless analog integrator and configurable temporal difference, combined with asynchronous communication protocols inside the focal plane. This strategy is conceived to allow extensive pitch compaction and readout speed increase by the suppression of in-pixel digital filtering, and the use of dynamic bandwidth allocation in each pixel of the FPA. In order make the electrical validation of first prototypes independent of the expensive PbSe deposition processes at wafer level, investigation is extended as well to the development of affordable sensor emulation strategies and integrated test platforms specifically oriented to image read-out integrated circuits. DPS cells, imagers and test chips have been fabricated and characterized in standard 0.15μm 1P6M, 0.35μm 2P4M and 2.5μm 2P1M CMOS technologies, all as part of research projects with industrial partnership. The research has led to the first high-speed uncooled frame-based IR quantum imager monolithically fabricated in a standard VLSI CMOS technology, and has given rise to the Tachyon series [1], a new line of commercial IR cameras used in real-time industrial, environmental and transportation control systems. The frame-free architectures investigated in this work represent a firm step forward to push further pixel pitch and system bandwidth up to the limits imposed by the evolving PbSe detector in future generations of the device.La present tesi doctoral descriu la recerca i el desenvolupament d'una nova tecnologia monolítica d'imatgeria infraroja de longitud d'ona mitja (MWIR), no refrigerada i de baix cost, per a usos industrials d'alta velocitat. El treball pren el relleu dels últims avenços assolits pel soci industrial NIT S.L. en el camp dels detectors MWIR de PbSe depositats en fase vapor (VPD), afegint-hi coneixement fonamental en la investigació de noves tècniques de disseny de circuits VLSI analògics i mixtes pel desenvolupament del dispositiu integrat de lectura unit al detector pixelat. Es parteix de la hipòtesi que, mitjançant l'ús de les esmentades tècniques de disseny, les tecnologies CMOS estàndard satisfan tots els requeriments operacionals del detector VPD PbSe respecte a connectivitat, fiabilitat, funcionalitat i escalabilitat per integrar de forma econòmica el dispositiu. La càmera PbSe-CMOS resultant ha de consumir molt baixa potència, operar a freqüències de kHz, exhibir bona uniformitat, i encabir els píxels actius CMOS de lectura en el pitch compacte del pla focal de la imatge, tot atenent a les particulars característiques del detector: altes relacions de corrent d'obscuritat a senyal, elevats valors de capacitat paràsita a l'entrada i dispersions importants en el procés de fabricació. Amb la finalitat de complir amb els requisits previs, es proposen arquitectures de sensors de visió de molt baix acoblament interpíxel basades en l'ús d'una matriu de pla focal (FPA) de píxels actius exclusivament digitals. Cada píxel sensor digital (DPS) està equipat amb mòduls de comunicació d'alta velocitat, autopolarització, cancel·lació de l'offset, conversió analògica-digital (ADC) i correcció del soroll de patró fixe (FPN). El consum en cada cel·la es minimitza fent un ús exhaustiu del MOSFET operant en subllindar. L'objectiu últim és potenciar la integració de les tecnologies de sensat d'imatge infraroja (IR) basades en PbSe per expandir-ne el seu ús, no només a diferents escenaris, sinó també en diferents estadis de maduresa de la integració PbSe-CMOS. En aquest sentit, es proposa investigar un conjunt complet de blocs funcionals distribuïts en dos enfocs paral·lels: - Dispositius d'imatgeria MWIR "Smart" basats en frames utilitzant noves topologies de circuit DPS amb correcció de l'FPN en guany i offset. Aquesta línia de recerca exprimeix el pitch del detector per oferir una programabilitat completament digital a nivell de píxel i plena funcionalitat amb compensació de la capacitat paràsita d'entrada i memòria interna de fotograma. - Dispositius de visió MWIR "Compact"-pitch "frame-free" en base a un novedós esquema d'integració analògica en el DPS i diferenciació temporal configurable, combinats amb protocols de comunicació asíncrons dins del pla focal. Aquesta estratègia es concep per permetre una alta compactació del pitch i un increment de la velocitat de lectura, mitjançant la supressió del filtrat digital intern i l'assignació dinàmica de l'ample de banda a cada píxel de l'FPA. Per tal d'independitzar la validació elèctrica dels primers prototips respecte a costosos processos de deposició del PbSe sensor a nivell d'oblia, la recerca s'amplia també al desenvolupament de noves estratègies d'emulació del detector d'IR i plataformes de test integrades especialment orientades a circuits integrats de lectura d'imatge. Cel·les DPS, dispositius d'imatge i xips de test s'han fabricat i caracteritzat, respectivament, en tecnologies CMOS estàndard 0.15 micres 1P6M, 0.35 micres 2P4M i 2.5 micres 2P1M, tots dins el marc de projectes de recerca amb socis industrials. Aquest treball ha conduït a la fabricació del primer dispositiu quàntic d'imatgeria IR d'alta velocitat, no refrigerat, basat en frames, i monolíticament fabricat en tecnologia VLSI CMOS estàndard, i ha donat lloc a Tachyon, una nova línia de càmeres IR comercials emprades en sistemes de control industrial, mediambiental i de transport en temps real.Postprint (published version

    RF subsystem power consumption and induced radiation emulation

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    High-performance wireless interface for implant-to-air communications

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    Nous élaborons une interface cerveau-machine (ICM) entièrement sans fil afin de fournir un système de liaison directe entre le cerveau et les périphériques externes, permettant l’enregistrement et la stimulation du cerveau pour une utilisation permanente. Au cours de cette thèse, nous explorons la modélisation de canal, les antennes implantées et portables en tant que propagateurs appropriés pour cette application, la conception du nouveau système d’un émetteur-récepteur UWB implantable, la conception niveau système du circuit et sa mise en oeuvre par un procédé CMOS TSMC 0.18 um. En plus, en collaboration avec Université McGill, nous avons conçu un réseau de seize antennes pour une détection du cancer du sein à l’aide d’hyperfréquences. Notre première contribution calcule la caractérisation de canal de liaison sans fil UWB d’implant à l’air, l’absorption spécifique moyennée (ASAR), et les lignes directrices de la FCC sur la densité spectrale de puissance UWB transmis. La connaissance du comportement du canal est nécessaire pour déterminer la puissance maximale permise à 1) respecter les lignes directrices ANSI pour éviter des dommages aux tissus et 2) respecter les lignes directrices de la FCC sur les transmissions non autorisées. Nous avons recours à un modèle réaliste du canal biologique afin de concevoir les antennes pour l’émetteur implanté et le récepteur externe. Le placement des antennes est examiné avec deux scénarios contrastés ayant des contraintés de puissance. La performance du système au sein des tissus biologiques est examinée par l’intermédiaire des simulations et des expériences. Notre deuxième contribution est dédiée à la conception des antennes simples et à double polarisation pour les systèmes d’enregistrement neural sans fil à bande ultra-large en utilisant un modèle multicouches inhomogène de la tête humaine. Les antennes fabriquées à partir de matériaux flexibles sont plus facilement adaptées à l’implantation ; nous étudions des matériaux à la fois flexibles et rigides et examinons des compromis de performance. Les antennes proposées sont conçues pour fonctionner dans une plage de fréquence de 2-11 GHz (ayant S11-dessous de -10 dB) couvrant à la fois la bande 2.45 GHz (ISM) et la bande UWB 3.1-10.6 GHz. Des mesures confirment les résultats de simulation et montrent que les antennes flexibles ont peu de dégradation des performances en raison des effets de flexion (en termes de correspondance d’impédance). Finalement, une comparaison est réalisée entre quatre antennes implantables, couvrant la gamme 2-11 GHz : 1) une rigide, à la polarisation simple, 2) une rigide, à double polarisation, 3) une flexible, à simple polarisation et 4) une flexible, à double polarisation. Dans tous les cas une antenne rigide est utilisée à l’extérieur du corps, avec une polarisation appropriée. Plusieurs avantages ont été confirmés pour les antennes à la polarisation double : 1) une taille plus petite, 2) la sensibilité plus faible aux désalignements angulaires, et 3) une plus grande fidélité. Notre troisième contribution fournit la conception niveau système de l’architecture de communication sans fil pour les systèmes implantés qui stimulent simultanément les neurones et enregistrent les réponses de neurones. Cette architecture prend en charge un grand nombre d’électrodes (> 500), fournissant 100 Mb/s pour des signaux de stimulation de liaison descendante, et Gb/s pour les enregistrements de neurones de liaison montante. Nous proposons une architecture d’émetteur-récepteur qui partage une antenne ultra large bande, un émetteur-récepteur simplifié, travaillant en duplex intégral sur les deux bandes, et un nouveau formeur d’impulsions pour la liaison montante du Gb/s soutenant plusieurs formats de modulation. Nous présentons une démonstration expérimentale d’ex vivo de l’architecture en utilisant des composants discrets pour la réalisation les taux Gb/s en liaison montante. Une bonne performance de taux d’erreur de bit sur un canal biologique à 0,5, 1 et 2 Gb/s des débits de données pour la télémétrie de liaison montante (UWB) et 100 Mb/s pour la télémétrie en liaison descendante (bande 2.45 GHz) est atteinte. Notre quatrième contribution présente la conception au niveau du circuit d’un dispositif d’émission en duplex total qui est présentée dans notre troisième contribution. Ce dispositif d’émission en duplex total soutient les applications d’interfaçage neural multimodal et en haute densité (les canaux de stimulant et d’enregistrement) avec des débits de données asymétriques. L’émetteur (TX) et le récepteur (RX) partagent une seule antenne pour réduire la taille de l’implant. Le TX utilise impulse radio ultra-wide band (IR-UWB) basé sur une approche alliant des bords, et le RX utilise un nouveau 2.4 GHz récepteur on-off keying (OOK).Une bonne isolation (> 20 dB) entre le trajet TX et RX est mis en oeuvre 1) par mise en forme des impulsions transmises pour tomber dans le spectre UWB non réglementé (3.1-7 GHz), et 2) par un filtrage espace-efficace du spectre de liaison descendante OOK dans un amplificateur à faible bruit RX. L’émetteur UWB 3.1-7 GHz peut utiliser soit OOK soit la modulation numérique binaire à déplacement de phase (BPSK). Le FDT proposé offre une double bande avec un taux de données de liaison montante de 500 Mbps TX et un taux de données de liaison descendante de 100 Mb/s RX, et il est entièrement en conformité avec les standards TSMC 0.18 um CMOS dans un volume total de 0,8 mm2. Ainsi, la mesure de consommation d’énergie totale en mode full duplex est de 10,4 mW (5 mW à 100 Mb/s pour RX, et de 5,4 mW à 500 Mb/s ou 10,8 PJ / bits pour TX). Notre cinquième contribution est une collaboration avec l’Université McGill dans laquelle nous concevons des antennes simples et à double polarisation pour les systèmes de détection du cancer du sein à l’aide d’hyperfréquences sans fil en utilisant un modèle multi-couche et inhomogène du sein humain. Les antennes fabriquées à partir de matériaux flexibles sont plus facilement adaptées à des applications portables. Les antennes flexibles miniaturisées monopôles et spirales sur un 50 um Kapton polyimide sont conçus, en utilisant high frequency structure simulator (HFSS), à être en contact avec des tissus biologiques du sein. Les antennes proposées sont conçues pour fonctionner dans une gamme de fréquences de 2 à 4 GHz. Les mesures montrent que les antennes flexibles ont une bonne adaptation d’impédance dans les différentes positions sur le sein. De Plus, deux antennes à bande ultralarge flexibles 4 × 4 (simple et à double polarisation), dans un format similaire à celui d’un soutien-gorge, ont été développés pour un système de détection du cancer du sein basé sur le radar.We are working on a fully wireless brain-machine-interface to provide a communication link between the brain and external devices, enabling recording and stimulating the brain for permanent usage. In this thesis we explore channel modeling, implanted and wearable antennas as suitable propagators for this application, system level design of an implantable UWB transceiver, and circuit level design and implementing it by TSMC 0.18 um CMOS process. Also, in a collaboration project with McGill University, we designed a flexible sixteen antenna array for microwave breast cancer detection. Our first contribution calculates channel characteristics of implant-to-air UWB wireless link, average specific absorption rate (ASAR), and FCC guidelines on transmitted UWB power spectral density. Knowledge of channel behavior is required to determine the maximum allowable power to 1) respect ANSI guidelines for avoiding tissue damage and 2) respect FCC guidelines on unlicensed transmissions. We utilize a realistic model of the biological channel to inform the design of antennas for the implanted transmitter and the external receiver. Antennas placement is examined under two scenarios having contrasting power constraints. Performance of the system within the biological tissues is examined via simulations and experiments. Our second contribution deals with designing single and dual-polarization antennas for wireless ultra-wideband neural recording systems using an inhomogeneous multi-layer model of the human head. Antennas made from flexible materials are more easily adapted to implantation; we investigate both flexible and rigid materials and examine performance trade-offs. The proposed antennas are designed to operate in a frequency range of 2–11 GHz (having S11 below -10 dB) covering both the 2.45 GHz (ISM) band and the 3.1–10.6 GHz UWB band. Measurements confirm simulation results showing flexible antennas have little performance degradation due to bending effects (in terms of impedance matching). Finally, a comparison is made of four implantable antennas covering the 2-11 GHz range: 1) rigid, single polarization, 2) rigid, dual polarization, 3) flexible, single polarization and 4) flexible, dual polarization. In all cases a rigid antenna is used outside the body, with an appropriate polarization. Several advantages were confirmed for dual polarization antennas: 1) smaller size, 2) lower sensitivity to angular misalignments, and 3) higher fidelity. Our third contribution provides system level design of wireless communication architecture for implanted systems that simultaneously stimulate neurons and record neural responses. This architecture supports large numbers of electrodes (> 500), providing 100 Mb/s for the downlink of stimulation signals, and Gb/s for the uplink neural recordings. We propose a transceiver architecture that shares one ultra-wideband antenna, a streamlined transceiver working at full-duplex on both bands, and a novel pulse shaper for the Gb/s uplink supporting several modulation formats. We present an ex-vivo experimental demonstration of the architecture using discrete components achieving Gb/s uplink rates. Good bit error rate performance over a biological channel at 0.5, 1, and 2 Gbps data rates for uplink telemetry (UWB) and 100 Mbps for downlink telemetry (2.45 GHz band) is achieved. Our fourth contribution presents circuit level design of the novel full-duplex transceiver (FDT) which is presented in our third contribution. This full-duplex transceiver supports high-density and multimodal neural interfacing applications (high-channel count stimulating and recording) with asymmetric data rates. The transmitter (TX) and receiver (RX) share a single antenna to reduce implant size. The TX uses impulse radio ultra-wide band (IR-UWB) based on an edge combining approach, and the RX uses a novel 2.4-GHz on-off keying (OOK) receiver. Proper isolation (> 20 dB) between the TX and RX path is implemented 1) by shaping the transmitted pulses to fall within the unregulated UWB spectrum (3.1-7 GHz), and 2) by spaceefficient filtering (avoiding a circulator or diplexer) of the downlink OOK spectrum in the RX low-noise amplifier. The UWB 3.1-7 GHz transmitter can use either OOK or binary phase shift keying (BPSK) modulation schemes. The proposed FDT provides dual band 500-Mbps TX uplink data rate and 100 Mbps RX downlink data rate, and it is fully integrated into standard TSMC 0.18 um CMOS within a total size of 0.8 mm2. The total measured power consumption is 10.4 mW in full duplex mode (5 mW at 100 Mbps for RX, and 5.4 mW at 500 Mbps or 10.8 pJ/bit for TX). Our fifth contribution is a collaboration project with McGill University which we design single and dual-polarization antennas for wireless ultra-wideband breast cancer detection systems using an inhomogeneous multi-layer model of the human breast. Antennas made from flexible materials are more easily adapted to wearable applications. Miniaturized flexible monopole and spiral antennas on a 50 um Kapton polyimide are designed, using a high frequency structure simulator (HFSS), to be in contact with biological breast tissues. The proposed antennas are designed to operate in a frequency range of 2–4 GHz (with reflection coefficient (S11) below -10 dB). Measurements show that the flexible antennas have good impedance matching while in different positions with different curvature around the breast. Furthermore, two flexible conformal 4×4 ultra-wideband antenna arrays (single and dual polarization), in a format similar to that of a bra, were developed for a radar-based breast cancer detection system

    An FPGA-based 3D backprojector

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    Subject of this thesis is the hardware architecture for the X-ray Computer Tomography. The main aim of the work is the development of a scalable, high-performance hardware for the reconstruction of a volume from cone-beam projections. A modified Feldkamp cone-beam reconstruction algorithm (Cylindrical algorithm) was used. The modifications of the original algorithm: parallelization and pipelining of the reconstruction, were formalized. Special attention was paid to the architecture of the memory system and to the schedule of the memory accesses.The developed architecture contains all steps of the reconstruction from cone-beam projections: filtering of the detector data, weighted backprojection and on-line geometry computations. The architecture was evaluated for the Xilinx Field Programmable Gate Array (FPGA). The simulations showed that the speed-up of the reconstruction of a volume is about an order of a magnitude compared to the currently available PC implementations.Gegenstand dieser Dissertation ist die Hardware-Architektur für die Röntgen-Computertomographie. Das Hauptziel der Arbeit ist die Entwicklung einer skalierbaren, leistungsstarken Hardware für die Rekonstruktion des Objektvolumens bei der Kegelstrahlprojektion. Dazu wurde ein modifizierter Feldkamp-Kegelstrahl-Rekonstruktionsalgorithmus benutzt (Zylinder-Algorithmus). Die Abwandlungen des Original-Algorithmus, Parallelisierung und Pipelining der Rekonstruktion, werden formal beschrieben. Besonderes Augenmerk wurde auf die Architektur des Speichersystems und das Timing des Speicherzugriffes gelegt. Die entwickelte Architektur enthält alle Schritte der Rekonstruktion von Kegelstrahlprojektionen: die Filterung der Detektordaten, die gewichtete Rückprojektion und Echtzeit-Geometrieberechnungen. Die Architektur wurde für ein Field Programmable Gate Array (FPGA) der Firma Xilinx evaluiert. Die Simulationen zeigten, dass die zur Rekonstruktion des Objektvolumens benötigte Zeit im Vergleich zu konventionellen PC-Implementierungen um eine Größenordnung verkürzt wurde
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