Minimum power design of RF front ends

This thesis describes an investigation into the design of RF front ends with minimum power dissipation. The central question is: "What are the fundamental limits for the power dissipation of telecommunication front ends, and what design procedures can be followed that approach these limits and, at the same time, result in practical circuits?" After a discussion of the state of the art in this area, the elementary operations of a front end are identified. For each of these elementary operations, the fundamental limits for the power dissipation are discussed, divided into technology imposed limits and physics imposed limits. A traditional DECT front end design is used to demonstrate the large difference between the fundamental limits and the power dissipation of existing circuits. To improve this situation, first the optimum distribution of specifications across individual subcircuits needs to be determined, such that the requirements for a specific system can be fulfilled. This is achieved through the introduction of formal transforms of the specifications of subcircuits, which correspond with transforms of the subcircuit itself. Using these transforms, the optimum distribution of gain, noise, linearity and power dissipation can be determined. As it turns out, this optimum distribution can even be represented by a simple, analytical expression. This expression predicts that the power dissipation of the DECT front end can be reduced by a factor of 2.7 through an optimum distribution of the specifications. Using these optimum specifications of the subcircuits, the boundaries for further power dissipation reduction can be determined. This is investigated at the system, circuit and technology level. These insights are used in the design of a 2.5GHz wireless local area network, implemented in an optimized technology ("Silicon on Anything"). The power dissipation of the complete receiver is 3.5mW, more than an order of magnitude below other wireless LAN receivers in recent publications. Finally, the combination of this minimum power design method with a platform based development strategy is discussed

Configurable circuits and their impact on multi-standard RF front-end architectures

This thesis studies configurable circuits and their impact on multi-standard RF front-end architectures. In particular, low-voltage low-power linear LNA and mixer topologies suitable for implementation in multi-standard front-ends are subject of the investigation. With respect to frequency and bandwidth, multi-standard front-ends can be implemented using either tunable or wideband LNA and mixer topologies. Based on the type of the LNA and mixer(s), multi-standard receiver RF front-ends can be divided into three groups. They can be (tunable) narrow-band, wide-band or combined. The advantages and disadvantages of the different multi-standard receiver RF front-ends have been discussed in detail. The partitioning between off-chip selectivity, on-chip selectivity provided by the LNA and mixer, linearity, power consumption and occupied chip area in each multi-standard RF front-end group are thoroughly investigated. A Figure of Merit (FOM) for the multi-standard receiver RF front-end has been introduced. Based on this FOM the most suitable multi-standard RF front-end group in terms of cost-effectiveness can be selected. In order to determine which multi-standard RF front-end group is the most cost-effective for a practical application, a GSM850/E-GSM/DCS/PCS/Bluetooth/WLANa/b/g multi-standard receiver RF front-end is chosen as a demonstrator. These standards are the most frequently used standards in wireless communication, and this combination of standards allows to users almost "anytime-anywhere" voice and data transfer. In order to verify these results, three demonstrators have been defined, designed and implemented, two wideband RF front-end circuits in 90nm CMOS and 65nm CMOS, and one combined multi-standard RF front-end circuit in 65nm CMOS. The proposed multi-standard demonstrators have been compared with the state-of the art narrow-band, wide-band and combined multi-standard RF front-ends. On the proposed multi-standard RF front-ends and the state-of the art multi-standard RF front-ends the proposed FOM have been applied. The comparison shows that the combined multi-standard RF front-end group is the most cost effective multi-standard group for this application

Particle imaging for daily in-room image guidance in particle therapy

Particle therapy exploits the highly localized depth dose profile of protons and light ions to deliver a high dose to the target while largely sparing surrounding healthy tissue. The steep dose gradient at the end of the ions range, known as the Bragg peak, however, also makes particle therapy sensitive to range uncertainties. In current clinical practice, a major cause of range uncertainties resides in the conversion of the treatment planning x-ray CT to the patient specific relative stopping power (RSP) map that is crucial for accurate treatment planning. By measuring the energy loss of particles after traversing the patient, particle imaging enables a more direct reconstruction of the RSP. In this thesis, different aspects towards the clinical implementation of particle imaging are investigated. First, a theoretical description of the point-spread function for different particle radiography algorithms is developed in order to explain observed limitations. A novel filtering technique to remove nuclear interaction events in particle imaging is proposed and high quality experimental helium ion CTs are demonstrated. First results from an experimental comparison between particle and x-ray CT modalities for RSP prediction in animal tissue samples are presented. Furthermore, a novel technique for intra-treatment helium ion imaging based on a mixed helium/carbon beam is explored with that relative range changes in the millimeter regime were observable. Finally, novel particle imaging detector designs are investigated. The thesis highlights the potential of helium ion imaging for pre- and intra-treatment image guidance in particle therapy

Dual-energy computed tomography for predicting range in particle therapy

Radiotherapy with protons or light ions is a highly precise form of cancer treatment. In treatment planning for particle therapy, ion stopping power ratio (SPR) maps of patient tissues are used to predict particle ranges and calculate dose distributions. To more accurately calculate dose distributions and minimize irradiating healthy tissue, it is crucial to improve SPR prediction. To this end, this thesis investigated dual-layer spectral computed tomography, a dual-energy CT (DECT) technique, as an alternative to conventional single-energy CT (SECT). The SECT-based method relies on converting CT numbers to SPR, yet CT numbers acquired from photon attenuation cannot be used to accurately predict energy loss by ions, which makes the approach indirect and heuristic. The DECT-based method, however, uses measurements of relative electron density and effective atomic number to directly and patient-specifically predict SPR. SPR prediction using DECT was evaluated in tissue-equivalent materials, anthropomorphic phantoms, and non-tissue materials; clinically analyzed in a retrospective patient study; and experimentally investigated for patients with dental materials. DECT-based SPR prediction improved dose calculation accuracy in particle therapy compared to SECT with a remaining range uncertainty of about 1% in controlled experimental scenarios. DECT may thus substantially improve range prediction for highly accurate particle therapy

Langattoman anturijärjestelmän suunnittelu hissin kunnonvalvontaan

The aim of this thesis is to design, implement and validate a prototype sensor system for wirelessly monitoring the condition of an elevator. One purpose of such system is long-term monitoring of the elevator, which could help detecting emerging issues in advance. The system could also be used by maintenance personnel as a real-time troubleshooting tool, assisting in device commissioning and maintenance situations, for example. Due to requirements set by the use case and the elevator environment, a wireless, battery operated device is required. A significant part of this thesis focuses on aspects of selecting a suitable wireless technology, as the choice has a large impact on the performance of the system. Different wireless solutions are researched and compared, and a technology using the sub-GHz frequency bands is selected for the prototypes. The prototype sensor is designed based on the choice of the wireless technology. The hardware and software of the sensor nodes, as well as a PC tool for collecting data, are presented. The performance of the sensor nodes and the functionality of the whole sensor system is tested using a batch of manufactured prototype devices. The prototypes and the selection of the wireless technology are considered successful. Minor improvements to the design of the prototypes are presented at the end of the thesis.Tässä työssä suunnitellaan, toteutetaan ja arvioidaan hissin kunnonvalvontaan tarkoitetun langattoman anturijärjestelmän prototyyppi. Järjestelmän käyttötarkoituksena on sekä hissin pitkäaikainen kunnonvalvonta, jonka avulla voidaan havaita orastavia vikoja etukäteen, että mahdollisuus käyttää laitetta reaaliaikaisena vianetsintätyökaluna, jota huoltohenkilöstö voisi käyttää apunaan esimerkiksi hissin käyttöönoton ja huoltotilanteiden yhteydessä. Käyttökohteen asettamien vaatimusten takia on tarpeen suunnitella langaton, paristokäyttöinen anturi. Merkittävä osa tästä työstä käsittelee langattoman teknologian valintaan vaikuttavia tekijöitä, sillä valinnalla on suuri vaikutus järjestelmän suorituskykyyn. Työssä kartoitetaan ja vertaillaan erilaisia langattomia ratkaisuita, joista prototyyppilaitteeseen valitaan sub-GHz-taajuuksia käyttävä langaton teknologia. Anturilaitteen prototyyppi suunnitellaan valitun langattoman teknologian pohjalta. Anturilaitteen elektroniikka, ohjelmisto, ja PC-tietokoneelle toteutettu datankeräystyökalu esitellään. Anturien suorituskyky sekä koko järjestelmän toiminta testataan valmistetuilla prototyyppikappaleilla. Prototyyppi arvioidaan toimivaksi ja langattoman teknologian valinta onnistuneeksi. Työn lopussa esitetään pieniä parannusehdotuksia prototyypin suunnitteluun

System-level design and RF front-end implementation for a 3-10ghz multiband-ofdm ultrawideband receiver and built-in testing techniques for analog and rf integrated circuits

This work consists of two main parts: a) Design of a 3-10GHz UltraWideBand (UWB) Receiver and b) Built-In Testing Techniques (BIT) for Analog and RF circuits. The MultiBand OFDM (MB-OFDM) proposal for UWB communications has received significant attention for the implementation of very high data rate (up to 480Mb/s) wireless devices. A wideband LNA with a tunable notch filter, a downconversion quadrature mixer, and the overall radio system-level design are proposed for an 11-band 3.4-10.3GHz direct conversion receiver for MB-OFDM UWB implemented in a 0.25mm BiCMOS process. The packaged IC includes an RF front-end with interference rejection at 5.25GHz, a frequency synthesizer generating 11 carrier tones in quadrature with fast hopping, and a linear phase baseband section with 42dB of gain programmability. The receiver IC mounted on a FR-4 substrate provides a maximum gain of 67-78dB and NF of 5-10dB across all bands while consuming 114mA from a 2.5V supply. Two BIT techniques for analog and RF circuits are developed. The goal is to reduce the test cost by reducing the use of analog instrumentation. An integrated frequency response characterization system with a digital interface is proposed to test the magnitude and phase responses at different nodes of an analog circuit. A complete prototype in CMOS 0.35mm technology employs only 0.3mm2 of area. Its operation is demonstrated by performing frequency response measurements in a range of 1 to 130MHz on 2 analog filters integrated on the same chip. A very compact CMOS RF RMS Detector and a methodology for its use in the built-in measurement of the gain and 1dB compression point of RF circuits are proposed to address the problem of on-chip testing at RF frequencies. The proposed device generates a DC voltage proportional to the RMS voltage amplitude of an RF signal. A design in CMOS 0.35mm technology presents and input capacitance <15fF and occupies and area of 0.03mm2. The application of these two techniques in combination with a loop-back test architecture significantly enhances the testability of a wireless transceiver system