This thesis describes an investigation into the design of RF front ends with minimum power dissipation. The central question is: "What are the fundamental limits for the power dissipation of telecommunication front ends, and what design procedures can be followed that approach these limits and, at the same time, result in practical circuits?" After a discussion of the state of the art in this area, the elementary operations of a front end are identified. For each of these elementary operations, the fundamental limits for the power dissipation are discussed, divided into technology imposed limits and physics imposed limits. A traditional DECT front end design is used to demonstrate the large difference between the fundamental limits and the power dissipation of existing circuits. To improve this situation, first the optimum distribution of specifications across individual subcircuits needs to be determined, such that the requirements for a specific system can be fulfilled. This is achieved through the introduction of formal transforms of the specifications of subcircuits, which correspond with transforms of the subcircuit itself. Using these transforms, the optimum distribution of gain, noise, linearity and power dissipation can be determined. As it turns out, this optimum distribution can even be represented by a simple, analytical expression. This expression predicts that the power dissipation of the DECT front end can be reduced by a factor of 2.7 through an optimum distribution of the specifications. Using these optimum specifications of the subcircuits, the boundaries for further power dissipation reduction can be determined. This is investigated at the system, circuit and technology level. These insights are used in the design of a 2.5GHz wireless local area network, implemented in an optimized technology ("Silicon on Anything"). The power dissipation of the complete receiver is 3.5mW, more than an order of magnitude below other wireless LAN receivers in recent publications. Finally, the combination of this minimum power design method with a platform based development strategy is discussed
