Design and layout strategies for integrated frequency synthesizers with high spectral purity

Dieser Beitrag ist mit Zustimmung des Rechteinhabers aufgrund einer (DFG geförderten) Allianz- bzw. Nationallizenz frei zugänglich.This publication is with permission of the rights owner freely accessible due to an Alliance licence and a national licence (funded by the DFG, German Research Foundation) respectively.Design guidelines for fractional-N phase-locked loops with a high spectral purity of the output signal are presented. Various causes for phase noise and spurious tones (spurs) in integer-N and fractional-N phase-locked loops (PLLs) are briefly described. These mechanisms include device noise, quantization noise folding, and noise coupling from charge pump (CP) and reference input buffer to the voltage-controlled oscillator (VCO) and vice versa through substrate and bondwires. Remedies are derived to mitigate the problems by using proper PLL parameters and a careful chip layout. They include a large CP current, sufficiently large transistors in the reference input buffer, linearization of the phase detector, a high speed of the programmable frequency divider, and minimization of the cross-coupling between the VCO and the other building blocks. Examples are given based on experimental PLLs in SiGe BiCMOS technologies for space communication and wireless base stations.BMBF, 03ZZ0512A, Zwanzig20 - Verbundvorhaben: fast-spot; TP1: Modularer Basisband- Prozessor mit extrem hohen Datenraten, sehr kurzen Latenzzeiten und SiGe-Analog-Frontend-IC-Fertigung bei >200 GHz Trägerfrequen

Performance Enhancement of MAF based PLL with Phase Error Compensation in the Pre-Filtering Stage

The large scale integration of Renewable Energy Sources (RES) requires sophisticated control techniques for efficient power transfer under faults and/or off-nominal grid conditions. A RES is efficiently integrated to the grid via proper control of the Grid Side Converter (GSC) by accurately estimating the grid voltage phase angle. Moving Average Filter (MAF) based Phase Lock Loop (PLL) techniques provide reduced complexity, however, they present disadvantages under specific grid fault conditions. The most recent MAF based technique is the EPMAFPLL, which provides improved dynamic response and reduces the phase error under off-nominal grid frequencies. However, the EPMAFPLL presents high phase and frequency overshoot at the time of fault. Furthermore, inaccurate harmonic mitigation under off-nominal grid frequencies was not investigated in EPMAFPLL. A modified EPMAFPLL (EPMAFPLL Type 2) is proposed in this paper. The modified EPMAFPLL accurately compensates the offset errors under off-nominal grid frequencies, offers lower frequency overshoot and faster dynamics under faults. In addition, it provides accurate compensation of grid voltage harmonics under off-nominal grid frequencies

Three-phase phase-locked loop algorithms based on sliding modes

© 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksThis article proposes a family of phase-locked loop schemes based on sliding modes. The use of sliding mode algorithms ensures fast response and global stability. In particular, two new algorithms are presented, both based on a complex framework for representing three-phase signals. This article compares the obtained algorithms with the traditional schemes, and a faster response is obtained when sliding modes are used. Additionally, as an application example, the algorithm is combined with a complex-coefficient filter that allows an easy identification of both positive and negative sequence harmonics. The proposed algorithms are illustrated by numerical simulations and experimentally validated using a digital signal processor.Peer ReviewedPostprint (published version