Components for Wide Bandwidth Signal Processing in Radio Astronomy

In radio astronomy wider observing bandwidths are constantly desired for the reasons of improved sensitivity and velocity coverage. As observing frequencies move steadily higher these needs become even more pressing. In order to process wider bandwidths, components that can perform at higher frequencies are required. The chief limiting component in the area of digital spectrometers and correlators is the digitiser. This is the component that samples and quantises the bandwidth of interest for further digital processing, and must function at a sample rate of at least twice the operating bandwidth. In this work a range of high speed digitiser integrated circuits (IC) are designed using an advanced InP HBT semiconductor process and their performance limits analysed. These digitiser ICs are shown to operate at up to 10 giga-samples/s, significantly faster than existing digitisers, and a complete digitiser system incorporating one of these is designed and tested that operates at up to 4 giga-samples/s, giving 2 GHz bandwidth coverage. The digitisers presented include a novel photonic I/O digitiser which contains an integrated photonic interface and is the first digitiser device reported with integrated photonic connectivity. In the complementary area of analogue correlators the limiting component is the device which performs the multiplication operation inherent in the correlation process. A 15 GHz analogue multiplier suitable for such systems is designed and tested and a full noise analysis of multipliers in analogue correlators presented. A further multiplier design in SiGe HBT technology is also presented which offers benefits in the area of low frequency noise. In the effort to process even wider bandwidths, applications of photonics to digitisers and multipliers are investigated. A new architecture for a wide bandwidth photonic multiplier is presented and its noise properties analysed, and the use of photonics to increase the sample rate of digitisers examined

A Unified Multi-Functional Dynamic Spectrum Access Framework: Tutorial, Theory and Multi-GHz Wideband Testbed

Dynamic spectrum access is a must-have ingredient for future sensors that are ideally cognitive. The goal of this paper is a tutorial treatment of wideband cognitive radio and radar—a convergence of (1) algorithms survey, (2) hardware platforms survey, (3) challenges for multi-function (radar/communications) multi-GHz front end, (4) compressed sensing for multi-GHz waveforms—revolutionary A/D, (5) machine learning for cognitive radio/radar, (6) quickest detection, and (7) overlay/underlay cognitive radio waveforms. One focus of this paper is to address the multi-GHz front end, which is the challenge for the next-generation cognitive sensors. The unifying theme of this paper is to spell out the convergence for cognitive radio, radar, and anti-jamming. Moore’s law drives the system functions into digital parts. From a system viewpoint, this paper gives the first comprehensive treatment for the functions and the challenges of this multi-function (wideband) system. This paper brings together the inter-disciplinary knowledge

Giga-hertz CMOS voltage controlled oscillators.

Leung Lai-Kan.Thesis (M.Phil.)--Chinese University of Hong Kong, 2001.Includes bibliographical references (leaves 131-154).Abstracts in English and Chinese.Abstract --- p.iAcknowledgement --- p.iiiTable of Contents --- p.ivList of Figures --- p.ixList of Tables --- p.xvChapter Chapter 1 --- Introduction --- p.1Chapter 1.1 --- Overview --- p.1Chapter 1.2 --- Objectives --- p.2Chapter 1.3 --- Thesis Organization --- p.4Chapter Chapter 2 --- Fundamentals of Voltage Controlled Oscillators --- p.6Chapter 2.1 --- Definition of Commonly Used Figures of Merit --- p.6Chapter 2.1.1 --- Cutoff frequency --- p.6Chapter 2.1.2 --- Center Frequency --- p.8Chapter 2.1.3 --- Tuning Range --- p.8Chapter 2.1.4 --- Tuning Sensitivity --- p.8Chapter 2.1.5 --- Output Power --- p.8Chapter 2.1.6 --- Power Consumption --- p.9Chapter 2.1.7 --- Supply Pulling --- p.9Chapter 2.2 --- Phase Noise --- p.9Chapter 2.2.1 --- Definition of Phase Noise --- p.9Chapter 2.2.2 --- Phase Noise Specification --- p.11Chapter 2.2.3 --- Leeson's formula --- p.12Chapter 2.2.4 --- Models developed by J. Cranincks and M. Steyaert10 --- p.13Chapter 2.2.5 --- Linear Time-Variant Phase Noise Model --- p.13Chapter 2.3 --- Building Blocks of Voltage Controlled Oscillators --- p.17Chapter 2.3.1 --- FETs --- p.17Chapter 2.3.2 --- Varactor --- p.18Chapter 2.3.3 --- Spiral Inductor --- p.21Chapter 2.3.4 --- Modeling of the Spiral Inductor --- p.24Chapter 2.3.5 --- Analysis and Simulation --- p.26Chapter Chapter 3 --- Digital Controlled Oscillator --- p.28Chapter 3.1 --- Introduction --- p.28Chapter 3.2 --- General Principle of Oscillation --- p.28Chapter 3.3 --- Different Oscillator Architectures --- p.30Chapter 3.3.1 --- Single-ended Ring Oscillator --- p.30Chapter 3.3.2 --- Differential Ring Oscillator --- p.32Chapter 3.3.3 --- CMOS Injection-locked Oscillator --- p.33Chapter 3.4 --- Basic Principle of the Injection-locked Oscillator --- p.34Chapter 3.5 --- Digital Controlled Oscillator --- p.36Chapter 3.5.1 --- R-2R Digital-to-Analog Converter --- p.37Chapter 3.6 --- Injection Locking --- p.42Chapter 3.6.1 --- Synchronization Model of the Injection Locked Oscillator --- p.42Chapter 3.7 --- Simulation Results --- p.44Chapter 3.7.1 --- Frequency Tuning Characteristics --- p.44Chapter 3.7.2 --- Phase Noise Performance --- p.47Chapter 3.7.3 --- Locking Characteristics --- p.48Chapter 3.7.4 --- Sensitivity to Supply Voltage and Temperature --- p.48Chapter 3.8 --- Conclusion --- p.49Chapter Chapter 4 --- CMOS LC Voltage Controlled Oscillator --- p.51Chapter 4.1 --- Introduction --- p.51Chapter 4.2 --- LC Oscillator --- p.52Chapter 4.3 --- Circuit Design --- p.54Chapter 4.3.1 --- Oscillation Frequency --- p.55Chapter 4.3.2 --- Oscillation Amplitude --- p.58Chapter 4.3.3 --- Transistor Sizing --- p.59Chapter 4.3.4 --- Power Consumption --- p.62Chapter 4.3.5 --- Tuning Range --- p.62Chapter 4.3.6 --- Phase Noise Analysis --- p.63Chapter 4.4 --- Conclusion --- p.70Chapter Chapter 5 --- LC Quadrature Voltage Controlled Oscillator --- p.71Chapter 5.1 --- Introduction --- p.71Chapter 5.2 --- Conventional CMOS Quadrature LC Voltage Controlled Oscillator --- p.73Chapter 5.3 --- Operational Principle of the CMOS Quadrature LC Voltage Controlled Oscillator --- p.74Chapter 5.3.1 --- General Explanation --- p.74Chapter 5.3.2 --- Mathematical Analysis --- p.75Chapter 5.3.3 --- Drawback of the Conventional CMOS LC Quadrature VCO --- p.77Chapter 5.4 --- Novel CMOS Low Noise Quadrature Voltage Controlled Oscillator --- p.78Chapter 5.4.1 --- Equivalent Output Noise due to the Coupling Transistor --- p.80Chapter 5.4.2 --- Linear Time Varying Model for the Analysis of Total Phase Noise --- p.83Chapter 5.4.3 --- Tuning Range --- p.94Chapter 5.4.4 --- Start-up Condition --- p.95Chapter 5.4.5 --- Power Consumption --- p.97Chapter 5.5 --- New Tuning Mechanism of the Proposed LC Quadrature VCO --- p.98Chapter 5.6 --- Modified Version of the Proposed LC Quadrature Voltage Controlled Oscillator --- p.105Chapter 5.7 --- Conclusion --- p.108Chapter Chapter 6 --- Layout Consideration --- p.109Chapter 6.1 --- Substrate Contacts --- p.109Chapter 6.2 --- Guard Rings --- p.110Chapter 6.3 --- Thermal Noise of the Gate Interconnect --- p.111Chapter 6.4 --- Use of Different Layers of Metal for Interconnection --- p.112Chapter 6.5 --- Slicing of Transistors --- p.113Chapter 6.6 --- Width of Interconnecting Wires and Numbers of Vias --- p.114Chapter 6.7 --- Matching of Devices --- p.114Chapter 6.8 --- Die Micrographs of the Prototypes of the Oscillators --- p.115Chapter Chapter 7 --- Experimental Results --- p.118Chapter 7.1 --- Methodology --- p.118Chapter 7.2 --- Evaluation Board --- p.119Chapter 7.3 --- Measurement Setup --- p.123Chapter 7.4 --- Experimental Results --- p.125Chapter 7.4.1 --- CMOS Injection Locked Oscillator --- p.125Chapter 7.4.2 --- LC Differential Voltage Controlled Oscillator --- p.128Chapter 7.4.3 --- LC Quadrature Voltage Controlled Oscillator --- p.132Chapter 7.5 --- Summary of Performance --- p.139Chapter Chapter 8 --- Conclusion --- p.142Chapter 8.1 --- Contribution --- p.142Chapter 8.2 --- Further Development --- p.143Chapter Chapter 9 --- Appendix --- p.145Chapter 9.1 --- Circuit Transformation --- p.145Chapter 9.2 --- Derivation of the Inductor Model with PGS --- p.146Chapter 9.2.1 --- "Inductance," --- p.146Chapter 9.2.2 --- "Series Resistance, Rs" --- p.146Chapter 9.2.3 --- Series Capacitance --- p.147Chapter 9.2.4 --- Shunt Oxide Capacitance --- p.147Chapter 9.3 --- Calculation of Phase Noise Using the Linear Time Variant Model --- p.148Chapter Chapter 10 --- Bibliography --- p.15

Technology Implications of UWB on Wireless Sensor Network-A detailed Survey

In today’s high tech “SMART” world sensor based networks are widely used. The main challenge with wireless-based sensor networks is the underneath physical layer. In this survey, we have identified core obstacles of wireless sensor network when UWB is used at PHY layer. This research was done using a systematic approach to assess UWB’s effectiveness (for WSN) based on information taken from various research papers, books, technical surveys and articles. Our aim is to measure the UWB’s effectiveness for WSN and analyze the different obstacles allied with its implementation. Starting from existing solutions to proposed theories. Here we have focused only on the core concerns, e.g. spectrum, interference, synchronization etc.Our research concludes that despite all the bottlenecks and challenges, UWB’s efficient capabilities makes it an attractive PHY layer scheme for the WSN, provided we can control interference and energy problems. This survey gives a fresh start to the researchers and prototype designers to understand the technological concerns associated with UWB’s implementatio

Design considerations for a monolithic, GaAs, dual-mode, QPSK/QASK, high-throughput rate transceiver

A monolithic, GaAs, dual mode, quadrature amplitude shift keying and quadrature phase shift keying transceiver with one and two billion bits per second data rate is being considered to achieve a low power, small and ultra high speed communication system for satellite as well as terrestrial purposes. Recent GaAs integrated circuit achievements are surveyed and their constituent device types are evaluated. Design considerations, on an elemental level, of the entire modem are further included for monolithic realization with practical fabrication techniques. Numerous device types, with practical monolithic compatability, are used in the design of functional blocks with sufficient performances for realization of the transceiver

Optimisation of Bluetooth wireless personal area networks

In recent years there has been a marked growth in the use of wireless cellular telephones, PCs and the Internet. This proliferation of information technology has hastened the advent of wireless networks which aim to increase the accessibility and reach of communications devices. Ambient Intelligence (Ami) is a vision of the future of computing in which all kinds of everyday objects will contain intelligence. To be effective, Ami requires Ubiquitous Computing and Communication, the latter being enabled by wireless networking. The IEEE's 802.11 task group has developed a series of radio based replacements for the familiar wired ethernet LAN. At the same time another IEEE standards task group, 802.15, together with a number of industry consortia, has introduced a new level of wireless networking based upon short range, ad-hoc connections. Currently, the most significant of these new Wireless Personal Area Network (WPAN) standards is Bluetooth, one of the first of the enabling technologies of Ami to be commercially available. Bluetooth operates in the internationally unlicensed Industrial, Scientific and Medical (ISM) band at 2.4 GHz. unfortunately, this spectrum is particularly crowded. It is also used by: WiFi (IEEE 802.11); a new WPAN standard called Zig- Bee; many types of simple devices such as garage door openers; and is polluted by unintentional radiators. The success of a radio specification for ubiquitous wireless communications is, therefore, dependant upon a robust tolerance to high levels of electromagnetic noise. This thesis addresses the optimisation of low power WPANs in this context, with particular reference to the physical layer radio specification of the Bluetooth system