Practical use of static composition of refactoring operations

6 pagesInternational audienceRefactoring tools are commonly used for remodularization tasks. Basic refactoring operations are combined to perform complex program transformations, but the resulting composed operations are rarely reused, even partially, because popular tools have few support for composition. In this paper, we recast two calculus for static composition of refactorings in a type system framework and we discuss their use for inferring useful properties. We illustrate the value of support for static composition in refactoring tools with a complex remodularization use case: a round-trip transformation between programs conforming to the Composite and Visitor patterns

An Ada programming support environment

The toolset of an Ada Programming Support Environment (APSE) being developed at North American Aircraft Operations (NAAO) of Rockwell International, is described. The APSE is resident on three different hosts and must support developments for the hosts and for embedded targets. Tools and developed software must be freely portable between the hosts. The toolset includes the usual editors, compilers, linkers, debuggers, configuration magnagers, and documentation tools. Generally, these are being supplied by the host computer vendors. Other tools, for example, pretty printer, cross referencer, compilation order tool, and management tools were obtained from public-domain sources, are implemented in Ada and are being ported to the hosts. Several tools being implemented in-house are of interest, these include an Ada Design Language processor based on compilable Ada. A Standalone Test Environment Generator facilitates test tool construction and partially automates unit level testing. A Code Auditor/Static Analyzer permits the Ada programs to be evaluated against measures of quality. An Ada Comment Box Generator partially automates generation of header comment boxes

Description of a landing site indicator (LASI) for light aircraft operation

An experimental cockpit mounted head-up type display system was developed and evaluated by LaRC pilots during the landing phase of light aircraft operations. The Landing Site Indicator (LASI) system display consists of angle of attack, angle of sideslip, and indicated airspeed images superimposed on the pilot's view through the windshield. The information is made visible to the pilot by means of a partially reflective viewing screen which is suspended directly in frot of the pilot's eyes. Synchro transmitters are operated by vanes, located at the left wing tip, which sense angle of attack and sideslip angle. Information is presented near the center of the display in the form of a moving index on a fixed grid. The airspeed is sensed by a pitot-static pressure transducer and is presented in numerical form at the top center of the display

A Constrained Sequential-Lamination Algorithm for the Simulation of Sub-Grid Microstructure in Martensitic Materials

We present a practical algorithm for partially relaxing multiwell energy densities such as pertain to materials undergoing martensitic phase transitions. The algorithm is based on sequential lamination, but the evolution of the microstructure during a deformation process is required to satisfy a continuity constraint, in the sense that the new microstructure should be reachable from the preceding one by a combination of branching and pruning operations. All microstructures generated by the algorithm are in static and configurational equilibrium. Owing to the continuity constrained imposed upon the microstructural evolution, the predicted material behavior may be path-dependent and exhibit hysteresis. In cases in which there is a strict separation of micro and macrostructural lengthscales, the proposed relaxation algorithm may effectively be integrated into macroscopic finite-element calculations at the subgrid level. We demonstrate this aspect of the algorithm by means of a numerical example concerned with the indentation of an Cu-Al-Ni shape memory alloy by a spherical indenter.Comment: 27 pages with 9 figures. To appear in: Computer Methods in Applied Mechanics and Engineering. New version incorporates minor revisions from revie

On the Hardness of Partially Dynamic Graph Problems and Connections to Diameter

Conditional lower bounds for dynamic graph problems has received a great deal of attention in recent years. While many results are now known for the fully-dynamic case and such bounds often imply worst-case bounds for the partially dynamic setting, it seems much more difficult to prove amortized bounds for incremental and decremental algorithms. In this paper we consider partially dynamic versions of three classic problems in graph theory. Based on popular conjectures we show that: -- No algorithm with amortized update time $O(n^{1-\varepsilon})$ exists for incremental or decremental maximum cardinality bipartite matching. This significantly improves on the $O(m^{1/2-\varepsilon})$ bound for sparse graphs of Henzinger et al. [STOC'15] and $O(n^{1/3-\varepsilon})$ bound of Kopelowitz, Pettie and Porat. Our linear bound also appears more natural. In addition, the result we present separates the node-addition model from the edge insertion model, as an algorithm with total update time $O(m\sqrt{n})$ exists for the former by Bosek et al. [FOCS'14]. -- No algorithm with amortized update time $O(m^{1-\varepsilon})$ exists for incremental or decremental maximum flow in directed and weighted sparse graphs. No such lower bound was known for partially dynamic maximum flow previously. Furthermore no algorithm with amortized update time $O(n^{1-\varepsilon})$ exists for directed and unweighted graphs or undirected and weighted graphs. -- No algorithm with amortized update time $O(n^{1/2 - \varepsilon})$ exists for incremental or decremental $(4/3-\varepsilon')$-approximating the diameter of an unweighted graph. We also show a slightly stronger bound if node additions are allowed. [...]Comment: To appear at ICALP'16. Abstract truncated to fit arXiv limit

Self-Partial and Dynamic Reconfiguration Implementation for AES using FPGA

This paper addresses efficient hardware/software implementation approaches for the AES (Advanced Encryption Standard) algorithm and describes the design and performance testing algorithm for embedded system. Also, with the spread of reconfigurable hardware such as FPGAs (Field Programmable Gate Array) embedded cryptographic hardware became cost-effective. Nevertheless, it is worthy to note that nowadays, even hardwired cryptographic algorithms are not so safe. From another side, the self-reconfiguring platform is reported that enables an FPGA to dynamically reconfigure itself under the control of an embedded microprocessor. Hardware acceleration significantly increases the performance of embedded systems built on programmable logic. Allowing a FPGA-based MicroBlaze processor to self-select the coprocessors uses can help reduce area requirements and increase a system's versatility. The architecture proposed in this paper is an optimal hardware implementation algorithm and takes dynamic partially reconfigurable of FPGA. This implementation is good solution to preserve confidentiality and accessibility to the information in the numeric communication

Interval Slopes as Numerical Abstract Domain for Floating-Point Variables

The design of embedded control systems is mainly done with model-based tools such as Matlab/Simulink. Numerical simulation is the central technique of development and verification of such tools. Floating-point arithmetic, that is well-known to only provide approximated results, is omnipresent in this activity. In order to validate the behaviors of numerical simulations using abstract interpretation-based static analysis, we present, theoretically and with experiments, a new partially relational abstract domain dedicated to floating-point variables. It comes from interval expansion of non-linear functions using slopes and it is able to mimic all the behaviors of the floating-point arithmetic. Hence it is adapted to prove the absence of run-time errors or to analyze the numerical precision of embedded control systems