6,232 research outputs found
General Algorithm For Improved Lattice Actions on Parallel Computing Architectures
Quantum field theories underlie all of our understanding of the fundamental
forces of nature. The are relatively few first principles approaches to the
study of quantum field theories [such as quantum chromodynamics (QCD) relevant
to the strong interaction] away from the perturbative (i.e., weak-coupling)
regime. Currently the most common method is the use of Monte Carlo methods on a
hypercubic space-time lattice. These methods consume enormous computing power
for large lattices and it is essential that increasingly efficient algorithms
be developed to perform standard tasks in these lattice calculations. Here we
present a general algorithm for QCD that allows one to put any planar improved
gluonic lattice action onto a parallel computing architecture. High performance
masks for specific actions (including non-planar actions) are also presented.
These algorithms have been successfully employed by us in a variety of lattice
QCD calculations using improved lattice actions on a 128 node Thinking Machines
CM-5.
{\underline{Keywords}}: quantum field theory; quantum chromodynamics;
improved actions; parallel computing algorithms
The Static Quark-Antiquark Potential: A ``Classical'' Experiment On The Connection Machine CM-2
We describe the Wuppertal university pilot project in applied parallel
computing. We report on a comprehensive high statistics determination of the
static quark-antiquark potential and related quantities from quenched quantum
chromodynamics. New data for the string tension and the plaquette action for
the region 5.5 < beta < 6.8 is presented.Comment: (Talk K. Schilling), 11 pages, postscript (\approx 250K
Towards Lattice Quantum Chromodynamics on FPGA devices
In this paper we describe a single-node, double precision Field Programmable
Gate Array (FPGA) implementation of the Conjugate Gradient algorithm in the
context of Lattice Quantum Chromodynamics. As a benchmark of our proposal we
invert numerically the Dirac-Wilson operator on a 4-dimensional grid on three
Xilinx hardware solutions: Zynq Ultrascale+ evaluation board, the Alveo U250
accelerator and the largest device available on the market, the VU13P device.
In our implementation we separate software/hardware parts in such a way that
the entire multiplication by the Dirac operator is performed in hardware, and
the rest of the algorithm runs on the host. We find out that the FPGA
implementation can offer a performance comparable with that obtained using
current CPU or Intel's many core Xeon Phi accelerators. A possible multiple
node FPGA-based system is discussed and we argue that power-efficient High
Performance Computing (HPC) systems can be implemented using FPGA devices only.Comment: 17 pages, 4 figure
Investigating the Dirac operator evaluation with FPGAs
In recent years the computational capacity of single Field Programmable Gate
Arrays (FPGA) devices as well as their versatility has increased significantly.
Adding to that the High Level Synthesis frameworks allowing to program such
processors in a high level language like C++, makes modern FPGA devices a
serious candidate as building blocks of a general purpose High Performance
Computing solution. In this contribution we describe benchmarks which we
performed using a Lattice QCD code, a highly compute-demanding HPC academic
code for elementary particle simulations. We benchmark the performance of a
single FPGA device running in two modes: using the external or embedded memory.
We discuss both approaches in detail using the Xilinx U250 device and provide
estimates for the necessary memory throughput and the minimal amount of
resources needed to deliver optimal performance depending on the available
hardware platform.Comment: 8 pages, 5 figure
Implementation of the conjugate gradient algorithm on FPGA devices
Results of porting parts of the Lattice Quantum Chromodynamics code to modern
FPGA devices are presented. A single-node, double precision implementation of
the Conjugate Gradient algorithm is used to invert numerically the Dirac-Wilson
operator on a 4-dimensional grid on a Xilinx Zynq evaluation board. The code is
divided into two software/hardware parts in such a way that the entire
multiplication by the Dirac operator is performed in programmable logic, and
the rest of the algorithm runs on the ARM cores. Optimized data blocks are used
to efficiently use data movement infrastructure allowing to reach intervals of
1 clock cycle. We show that the FPGA implementation can offer a comparable
performance compared to that obtained using Intel Xeon Phi KNL.Comment: Proceedings of the 36th Annual International Symposium on Lattice
Field Theory - LATTICE201
Practical Implementation of Lattice QCD Simulation on Intel Xeon Phi Knights Landing
We investigate implementation of lattice Quantum Chromodynamics (QCD) code on
the Intel Xeon Phi Knights Landing (KNL). The most time consuming part of the
numerical simulations of lattice QCD is a solver of linear equation for a large
sparse matrix that represents the strong interaction among quarks. To establish
widely applicable prescriptions, we examine rather general methods for the SIMD
architecture of KNL, such as using intrinsics and manual prefetching, to the
matrix multiplication and iterative solver algorithms. Based on the performance
measured on the Oakforest-PACS system, we discuss the performance tuning on KNL
as well as the code design for facilitating such tuning on SIMD architecture
and massively parallel machines.Comment: 8 pages, 12 figures. Talk given at LHAM'17 "5th International
Workshop on Legacy HPC Application Migration" in CANDAR'17 "The Fifth
International Symposium on Computing and Networking" and to appear in the
proceeding
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