Criteria for the Design of "fast," "safe" Asynchronous Sequential Fluidic Circuits

Engineerin

Stochastic and adaptive systems : interim report

Includes bibliographical references.Research supported by Air Force Office of Scientific Research (AFSC), Research Grant AFOSR 77-3281. Covers time period, March 1, 1977 to February 28, 1978.by Michael Athans and Sanjoy K. Mitter

The Fifth NASA Symposium on VLSI Design

The fifth annual NASA Symposium on VLSI Design had 13 sessions including Radiation Effects, Architectures, Mixed Signal, Design Techniques, Fault Testing, Synthesis, Signal Processing, and other Featured Presentations. The symposium provides insights into developments in VLSI and digital systems which can be used to increase data systems performance. The presentations share insights into next generation advances that will serve as a basis for future VLSI design

Mechanisms for the generation and regulation of sequential behaviour

A critical aspect of much human behaviour is the generation and regulation of sequential activities. Such behaviour is seen in both naturalistic settings such as routine action and language production and laboratory tasks such as serial recall and many reaction time experiments. There are a variety of computational mechanisms that may support the generation and regulation of sequential behaviours, ranging from those underlying Turing machines to those employed by recurrent connectionist networks. This paper surveys a range of such mechanisms, together with a range of empirical phenomena related to human sequential behaviour. It is argued that the empirical phenomena pose difficulties for most sequencing mechanisms, but that converging evidence from behavioural flexibility, error data arising from when the system is stressed or when it is damaged following brain injury, and between-trial effects in reaction time tasks, point to a hybrid symbolic activation-based mechanism for the generation and regulation of sequential behaviour. Some implications of this view for the nature of mental computation are highlighted

Control optimization, stabilization and computer algorithms for aircraft applications

Description based on: 22nd, Mar./Sept.1977 Edited by: Michael Athans, Alan S. Willsky, 1979/80-NASA Grant NGL 22-009-124. M.I.T. Project OSP 76265. Issued by: M.I.T. Electronic Systems Laboratory, -1978; M.I.T. Laboratory for Information and Decision Systems, 197

The Cyber Physical Implementation of Cloud Manufactuirng Monitoring Systems

AbstractThe rise of the industrial internet has been envisaged as a key catalyst for creating the intelligent manufacturing plant of the future through enabling open data distribution for cloud manufacturing. The context supporting these systems has been defined by Service Oriented Architectures (SOA) that facilitate data resource and computational functions as services available on a network. SOA has been at the forefront EU research over the past decade and several industrially implemented SOA technologies exist on the manufacturing floor. However it is still unclear whether SOA can meet the multi-layered requirements present within state-of-the-art manufacturing Cyber Physical Systems (CPS). The focus of this research is to identify the capability of SOA to be implemented at different execution layers present in a manufacturing CPS. The state-of-the-art for manufacturing CPS is represented by the ISA-95 standard and is correlated with different temporal analysis scales, and manufacturing computational requirements. Manufacturing computational requirements are identified through a review of open and closed loop machine control orientations, and continuous and discrete control methods. Finally the Acquire Recognise Cluster (ARC) SOA for reconfigurable manufacturing process monitoring systems is reviewed, to provide a topological view of data flow within a field level manufacturing SOA

SPECIFICATION AND REALISATION OF LOGIC CONTROL PROCEDURES ON THE BASIS OF PRESCRIBED INPUT-OUTPUT CHANGES

In this report, a method is outlined for handling the logic control procedures both in the specification level and on the hardware implementation level of the design. The heuristic and intuitive character of constructing the flow chart and defining the states has been reduced to a large extent. This method may result in several kinds of uniform hardware structures for either synchronous or asynchronous control units initially specified only by input-output sequences. Introducing differential mappings for the description of sequential operation, the prescribed sequences for input and output changes can be considered as the initial specification of a control unit. This specification yields a so-called B : K table and aB: K graph as representation of the required operation. The definition of the states is made by interpreting the compatibility relation between the prescribed output changes. . The procedure of the state definition results in the B: K : A set or graph which corresponds to the minimised flow table obtained from the state reduction of incompletely specified sequential circuits. The properties of the canonical B : K set and graph always ensure the existence of an optimal cover. If the fixed hardware structure contains flip-flops for storing the output combination, then the influence of these flip-flops on the state reduction are automatically taken into consideration by the method outlined in the report. Also, by the introduction of an optimal cover for the identifying functions related to the output changes, the logical expressions for the realisation of the hardware can be simplified. The specification and description method, outlined in this report, has the advantage of defining the prescribed sequences of input and output changes in separate fragments. Applying the prescribed input section changes. these separate fragments can be joined together and the B : K set can be calculated systematically. In this way, the specification for the synthesis procedure may become more rigorous than it was initially. However, it is not necessary to form a coherent specification by intuition

NASA Space Engineering Research Center for VLSI System Design

This annual report outlines the activities of the past year at the NASA SERC on VLSI Design. Highlights for this year include the following: a significant breakthrough was achieved in utilizing commercial IC foundries for producing flight electronics; the first two flight qualified chips were designed, fabricated, and tested and are now being delivered into NASA flight systems; and a new technology transfer mechanism has been established to transfer VLSI advances into NASA and commercial systems