Design And Characterization Of Noveldevices For New Generation Of Electrostaticdischarge (esd) Protection Structures

The technology evolution and complexity of new circuit applications involve emerging reliability problems and even more sensitivity of integrated circuits (ICs) to electrostatic discharge (ESD)-induced damage. Regardless of the aggressive evolution in downscaling and subsequent improvement in applications\u27 performance, ICs still should comply with minimum standards of ESD robustness in order to be commercially viable. Although the topic of ESD has received attention industry-wide, the design of robust protection structures and circuits remains challenging because ESD failure mechanisms continue to become more acute and design windows less flexible. The sensitivity of smaller devices, along with a limited understanding of the ESD phenomena and the resulting empirical approach to solving the problem have yielded time consuming, costly and unpredictable design procedures. As turnaround design cycles in new technologies continue to decrease, the traditional trial-and-error design strategy is no longer acceptable, and better analysis capabilities and a systematic design approach are essential to accomplish the increasingly difficult task of adequate ESD protection-circuit design. This dissertation presents a comprehensive design methodology for implementing custom on-chip ESD protection structures in different commercial technologies. First, the ESD topic in the semiconductor industry is revised, as well as ESD standards and commonly used schemes to provide ESD protection in ICs. The general ESD protection approaches are illustrated and discussed using different types of protection components and the concept of the ESD design window. The problem of implementing and assessing ESD protection structures is addressed next, starting from the general discussion of two design methods. The first ESD design method follows an experimental approach, in which design requirements are obtained via fabrication, testing and failure analysis. The second method consists of the technology computer aided design (TCAD)-assisted ESD protection design. This method incorporates numerical simulations in different stages of the ESD design process, and thus results in a more predictable and systematic ESD development strategy. Physical models considered in the device simulation are discussed and subsequently utilized in different ESD designs along this study. The implementation of new custom ESD protection devices and a further integration strategy based on the concept of the high-holding, low-voltage-trigger, silicon controlled rectifier (SCR) (HH-LVTSCR) is demonstrated for implementing ESD solutions in commercial low-voltage digital and mixed-signal applications developed using complementary metal oxide semiconductor (CMOS) and bipolar CMOS (BiCMOS) technologies. This ESD protection concept proposed in this study is also successfully incorporated for implementing a tailored ESD protection solution for an emerging CMOS-based embedded MicroElectroMechanical (MEMS) sensor system-on-a-chip (SoC) technology. Circuit applications that are required to operate at relatively large input/output (I/O) voltage, above/below the VDD/VSS core circuit power supply, introduce further complications in the development and integration of ESD protection solutions. In these applications, the I/O operating voltage can extend over one order of magnitude larger than the safe operating voltage established in advanced technologies, while the IC is also required to comply with stringent ESD robustness requirements. A practical TCAD methodology based on a process- and device- simulation is demonstrated for assessment of the device physics, and subsequent design and implementation of custom P1N1-P2N2 and coupled P1N1-P2N2//N2P3-N3P1 silicon controlled rectifier (SCR)-type devices for ESD protection in different circuit applications, including those applications operating at I/O voltage considerably above/below the VDD/VSS. Results from the TCAD simulations are compared with measurements and used for developing technology- and circuit-adapted protection structures, capable of blocking large voltages and providing versatile dual-polarity symmetric/asymmetric S-type current-voltage characteristics for high ESD protection. The design guidelines introduced in this dissertation are used to optimize and extend the ESD protection capability in existing CMOS/BiCMOS technologies, by implementing smaller and more robust single- or dual-polarity ESD protection structures within the flexibility provided in the specific fabrication process. The ESD design methodologies and characteristics of the developed protection devices are demonstrated via ESD measurements obtained from fabricated stand-alone devices and on-chip ESD protections. The superior ESD protection performance of the devices developed in this study is also successfully verified in IC applications where the standard ESD protection approaches are not suitable to meet the stringent area constraint and performance requirement

Electrostatic Discharge

As we enter the nanoelectronics era, electrostatic discharge (ESD) phenomena is an important issue for everything from micro-electronics to nanostructures. This book provides insight into the operation and design of micro-gaps and nanogenerators with chapters on low capacitance ESD design in advanced technologies, electrical breakdown in micro-gaps, nanogenerators from ESD, and theoretical prediction and optimization of triboelectric nanogenerators. The information contained herein will prove useful for for engineers and scientists that have an interest in ESD physics and design

Monolithic Integration Piezoelectric Resonators on CMOS for Radio-Frequency and Sensing Applications

Software cognitive radios and Internet of Things (IoT) are recent interest areas that need low loss and low power consumption hardware. More specifically, the area of software cognitive radios requires that hardware be frequency agile and highly selective. Meanwhile, IoT relies on multiple low power sensor networks. By combining Complementary Metal Oxide Semiconductors (CMOS) technology with piezoelectric Micro-Electro-Mechanical Systems (MEMS), we can fabricate Systems-on-Chip (SoC) that can be used as filters or references (oscillators) and highly selective sensors. In this work we developed a die-level compatible process for the monolithic integration of Bulk Acoustic Resonators (BAWs) on CMOS for low power, reduced area and high-quality passives for radio frequency applications. Using CMOS as a fabrication substrate some stringent requirements were added to maintain the dies and the technology’s integrity. A few of these limitations were the need for a low thermal budget fabrication process, die handling and electro-static discharge (ESD) protection. The devices were first fabricated on glass for modeling extraction that was later used for the design of the integrated circuits (IC). Three integrated circuits were designed as substrates for the integration using IBM’s 180nm and TSMC’s 65nm technology. A monolithic BAW oscillator with a resonance frequency of 1.8GHz was demonstrated with an FOM ~186dBc/Hz, comparable to other academia work. Using the developed process, a membrane BAW structure (FBAR) was integrated as well. Using a susceptor coating and zinc oxide’s (ZnO) high temperature coefficient of frequency (TCF) the device was studied as an alternative uncooled infrared sensor. Finally, a reprogrammable IC and an RF PCB were designed for volatile organic compound (VOC) testing using self-assembled monolayers (SAMs) as the absorber layer

Hard macrocells for DC/DC converter in automotive embedded mechatronic systems

A novel configurable DC/DC converter architecture, to be integrated as hard macrocell in automotive embedded systems, is proposed in the paper. It aims at realizing an intelligent voltage regulator. With respect to the state of the art, the challenge is the integration into an automotive-qualified chip of several advanced features like dithering of switching frequency, nested control loops with both current and voltage feedback, asynchronous hysteretic control for low power mode, slope control of the power FET gate driver, and diagnostic block against out-of-range current or voltage or temperature conditions. Moreover, the converter macrocell can be connected to the in-vehicle digital network, exchanging with the main vehicle control unit status/diagnostic flags and commands. The proposed design can be configured to work both in step-up and step-down modes, to face a very wide operating input voltage range from 2.5 to 60 V and absolute range from −0.3 to 70 V. The main target is regulating all voltages required in the emerging hybrid/electric vehicles where, besides the conventional 12 V DC bus, also a 48 V DC bus is present. The proposed design supports also digital configurability of the output regulated voltage, through a programmable divider, and of the coefficients of the proportional-integrative controller inside the nested control loops. Fabricated in 0.35 μm CMOS technology, experimental measurements prove that the IC can operate in harsh automotive environments since it meets stringent requirements in terms of electrostatic discharge (ESD) protection, operating temperature range, out-of-range current, or voltage condition

On-chip electrochemical capacitors and piezoelectric energy harvesters for self-powering sensor nodes

On-chip sensing and communications in the Internet of things platform have benefited from the miniaturization of faster and low power complementary-metal-oxide semiconductor (CMOS) microelectronics. Micro-electromechanical systems technology (MEMS) and development of novel nanomaterials have further improved the performance of sensors and transducers while also demonstrating reduction in size and power consumption. Integration of such technologies can enable miniaturized nodes to be deployed to construct wireless sensor networks for autonomous data acquisition. Their longevity, however, is determined by the lifetime of the power supply. Traditional batteries cannot fully fulfill the demands of sensor nodes that require long operational duration. Thus, we require solutions that produce their own electricity from the surroundings and store them for future utility. Furthermore, manufacturing of such a power supply must be compatible with CMOS and MEMS technology. In this thesis, we will describe on-chip electrochemical capacitors and piezoelectric energy harvesters as components of such a self-powered sensor node. Our piezoelectric microcantilevers confirm the feasibility of fabricating micro electro-mechanical-systems (MEMS) size two-degree-of-freedom systems which can address the major issue of small bandwidth of piezoelectric micro-energy harvesters. These devices use a cut-out trapezoidal cantilever beam, limited by its footprint area i.e. a 1 cm$^2$ silicon die, to enhance the stress on the cantilever\u27s free end while reducing the gap remarkably between its first two eigenfrequencies in the 400 - 500 Hz and in the 1 - 2 kHz range. The energy from the M-shaped harvesters could be stored in rGO based on-chip electrochemical capacitors. The electrochemical capacitors are manufactured through CMOS compatible, reproducible, and reliable micromachining processes such as chemical vapor deposition of carbon nanofibers (CNF) and spin coating of graphene oxide based (GO) solutions. The impact of electrode geometry and electrode thickness is studied for CNF based electrodes. Furthermore, we have also demonstrated an improvement in their electrochemical performance and yield of spin coated electrochemical capacitors through surface roughening from iron and chromium nanoparticles. The CVD grown CNF and spin coated rGO based devices are evaluated for their respective trade-offs. Finally, to improve the energy density and demonstrate the versatility of the spin coating process, we manufactured electrochemical capacitors from various GO based composites with functional groups heptadecan-9-amine and octadecanamine. The materials were used as a stack to demonstrate high energy density for spin coated electrochemical capacitors. We have also examined the possibility of integrating these devices into a power management unit to fully realize a self-powering on-chip power supply through survey of package fabrication, choice of electrolyte, and device assembly