High Efficiency Power Management Unit for Implantable Optical-Electrical Stimulators

Battery-less active implantable devices are of interest because they offer longer life span and eliminate costly battery replacement surgical interventions. This is possible as a result of advances in inductive power transfer and development of power management circuits to maximize the overall power transfer and provide various voltage levels for multi-functional implantable devices. Rehabilitation therapy using optical stimulation of genetically modified peripheral neurons requires high current loads. Standard rectification topologies are inefficient and have associated voltage drops unsuited for miniaturized implants. This paper presents an integrated power management unit (PMU) for an optical-electrical stimulator to be used in the treatment of motor neurone disease. It includes a power-efficient regulating rectifier with a novel body biased high-speed comparator providing 3.3 V for the operation of the stimulator, a 3-stage latch-up charge pump with 12 V output for the input stage of the optical-electrical stimulator, and 1.8 V for digital control logic. The chip was fabricated in a 0.18 μm CMOS process. Measured results show that for a regulated output of 3.3 V delivering 30.3 mW power, the peak power conversion efficiency is 84.2% at 6.78 MHz inductive link tunable frequency reducing to 70.3% at 13.56 MHz. The charge pump with on chip capacitors has 90.9% measured voltage conversion efficiency

Architecture of Micro Energy Harvesting Using Hybrid Input of RF, Thermal and Vibration for Semi-Active RFID Tag

This research work presents a novel architecture of Hybrid Input Energy Harvester (HIEH) system for semi-active Radio Frequency Identification (RFID) tags. The proposed architecture consists of three input sources of energy which are radio frequency signal, thermal and vibration. The main purpose is to solve the semi-active RFID tags limited lifespan issues due to the need for batteries to power their circuitries. The focus will be on the rectifiers and DC-DC converter circuits with an ultra-low power design to ensure low power consumption in the system. The design architecture will be modelled and simulated using PSpice software, Verilog coding using Mentor Graphics and real-time verification using field-programmable gate array board before being implemented in a 0.13 µm CMOS technology. Our expectations of the results from this architecture are it can deliver 3.3 V of output voltage, 6.5 mW of output power and 90% of efficiency when all input sources are simultaneously harvested. The contribution of this work is it able to extend the lifetime of semi-active tag by supplying electrical energy continuously to the device. Thus, this will indirectly  reduce the energy limitation problem, eliminate the dependency on batteries and make it possible to achieve a batteryless device.This research work presents a novel architecture of Hybrid Input Energy Harvester (HIEH) system for semi-active Radio Frequency Identification (RFID) tags. The proposed architecture consists of three input sources of energy which are radio frequency signal, thermal and vibration. The main purpose is to solve the semi-active RFID tags limited lifespan issues due to the need for batteries to power their circuitries. The focus will be on the rectifiers and DC-DC converter circuits with an ultra-low power design to ensure low power consumption in the system. The design architecture will be modelled and simulated using PSpice software, Verilog coding using Mentor Graphics and real-time verification using field-programmable gate array board before being implemented in a 0.13 µm CMOS technology. Our expectations of the results from this architecture are it can deliver 3.3 V of output voltage, 6.5 mW of output power and 90% of efficiency when all input sources are simultaneously harvested. The contribution of this work is it able to extend the lifetime of semi-active tag by supplying electrical energy continuously to the device. Thus, this will indirectly  reduce the energy limitation problem, eliminate the dependency on batteries and make it possible to achieve a batteryless device

A Wireless Implantable System for Facilitating Gastrointestinal Motility.

Gastrointestinal (GI) electrical stimulation has been shown in several studies to be a potential treatment option for GI motility disorders. Despite the promising preliminary research progress, however, its clinical applicability and usability are still unknown and limited due to the lack of a miniaturized versatile implantable stimulator supporting the investigation of effective stimulation patterns for facilitating GI dysmotility. In this paper, we present a wireless implantable GI modulation system to fill this technology gap. The system consists of a wireless extraluminal gastrointestinal modulation device (EGMD) performing GI electrical stimulation, and a rendezvous device (RD) and a custom-made graphical user interface (GUI) outside the body to wirelessly power and configure the EGMD to provide the desired stimuli for modulating GI smooth muscle activities. The system prototype was validated in bench-top and in vivo tests. The GI modulation system demonstrated its potential for facilitating intestinal transit in the preliminary in vivo chronic study using porcine models

±0.25-V Class-AB CMOS Capacitance Multiplier and Precision Rectifiers

Reduction of minimum supply requirements is a crucial aspect to decrease the power consumption in VLSI systems. A high-performance capacitance multiplier able to operate with supplies as low as ±0.25 V is presented. It is based on adaptively biased class-AB current mirrors which provide high current efficiency. Measurement results of a factor 11 capacitance multiplier fabricated in 180-nm CMOS technology verify theoretical claims. Moreover, low-voltage precision rectifiers based on the same class-AB current mirrors are designed and fabricated in the same CMOS process. They generate output currents over 100 times larger than the quiescent current. Both proposed circuits have 300-nW static power dissipation when operating with ±0.25-V supplies

Rectification, amplification and switching capabilities for energy harvesting systems: power management circuit for piezoelectric energy harvester

Dissertação de mestrado em Biomedical EngineeringA new energy mechanism needs to be addressed to overcome the battery dependency, and consequently extend Wireless Sensor Nodes (WSN) lifetime effectively. Energy Harvesting is a promising technology that can fulfill that premise. This work consists of the realization of circuit components employable in a management system for a piezoelectric-based energy harvester, with low power consumption and high efficiency. The implementation of energy harvesting systems is necessary to power-up front-end applications without any battery. The input power and voltage levels generated by the piezoelectric transducer are relatively low, especially in small-scale systems, as such extra care has to be taken in power consumption and efficiency of the circuits. The main contribution of this work is a system capable of amplifying, rectifying and switching the unstable signal from an energy harvester source. The circuit components are designed based on 0.13 Complementary Metal-Oxide-Semiconductor (CMOS) technology. An analog switch, capable of driving the harvesting circuit at a frequency between 1 and 1 , with proper temperature behaviour, is designed and verified. An OFF resistance of 520.6 Ω and isolation of −111.24 , grant excellent isolation to the circuit. The designed voltage amplifier is capable of amplifying a minor signal with a gain of 42.56 , while requiring low power consumption. The output signal is satisfactorily amplified with a reduced offset voltage of 8 . A new architecture of a two-stage active rectifier is proposed. The power conversion efficiency is 40.4%, with a voltage efficiency of up to 90%. Low power consumption of 17.7 is achieved by the rectifier, with the embedded comparator consuming 113.9 . The outcomes validate the circuit’s power demands, which can be used for other similar applications in biomedical, industrial, and commercial fields.Para combater a dependência dos dispositivos eletrónicos relativamente ás baterias é necessário um novo sistema energético, que permita prolongar o tempo de vida útil dos mesmos. Energy Harvesting é uma tecnologia promissora utilizada para alimentar dispositivos sem bateria. Este trabalho consiste na realização de componentes empregáveis num circuito global para extrair energia a partir ds vibrações de um piezoelétricos com baixo consumo de energia e alta eficiência. Os níveis de potência e voltagem gerados pelo transdutor piezoelétrico são relativamente baixos, especialmente em sistemas de pequena escala, por isso requerem cuidado extra relativamente ao consumo de energia e eficiência dos circuitos. A principal contribuição deste trabalho é um sistema apropriado para amplificar, retificar e alternar o sinal instável proveniente de uma fonte de energy harvesting. Os componentes do sistema são implementados com base na tecnologia CMOS com 0.13 . Um interruptor analógico capaz de modelar a frequência do sinal entre 1 e 1 e estável perante variações de temperatura, é implementado. O circuito tem um excelente isolamento de −111.24 , devido a uma resistência OFF de 520.6 Ω. O amplificador implementado é apto a amplificar um pequeno sinal com um ganho de 42.56 e baixo consumo. O sinal de saída é satisfatoriamente amplificado com uma voltagem de offset de 8 . Um retificador ativo de dois estágios com uma nova arquitetura é proposto. A eficiência de conversão de energia atinge os 40.4%, com uma eficiência de voltagem até 90%. O retificador consome pouca energia, apenas 17.7 , incorporando um comparador de 113.9 . Os resultados validam as exigências energéticas do circuito, que pode ser usado para outras aplicações similares no campo biomédico, industrial e comercial

A self-powered single-chip wireless sensor platform

Internet of things” require a large array of low-cost sensor nodes, wireless connectivity, low power operation and system intelligence. On the other hand, wireless biomedical implants demand additional specifications including small form factor, a choice of wireless operating frequencies within the window for minimum tissue loss and bio-compatibility This thesis describes a low power and low-cost internet of things system suitable for implant applications that is implemented in its entirety on a single standard CMOS chip with an area smaller than 0.5 mm2. The chip includes integrated sensors, ultra-low-power transceivers, and additional interface and digital control electronics while it does not require a battery or complex packaging schemes. It is powered through electromagnetic (EM) radiation using its on-chip miniature antenna that also assists with transmit and receive functions. The chip can operate at a short distance (a few centimeters) from an EM source that also serves as its wireless link. Design methodology, system simulation and optimization and early measurement results are presented

Efficient Dual Output Regulating Rectifier and Adiabatic Charge Pump for Biomedical Applications Employing Wireless Power Transfer †

A power management unit (PMU) is an essential block for diversified multi-functional low-power Internet of Things (IoT) and biomedical electronics. This paper includes a theoretical analysis of a high current, single-stage ac-dc, reconfigurable, dual output, regulating rectifier consisting of pulse width modulation (PWM) and pulse frequency modulation (PFM). The regulating rectifier provides two independently regulated supply voltages of 1.8 V and 3.3 V from an input ac voltage. The PFM control feedback consists of feedback-driven regulation to adjust the driving frequency of the power transistors through adaptive buffers in the active rectifier. The PWM/PFM mode control provides a feedback loop to adjust the conduction duration accurately and minimize power losses. The design also includes an adiabatic charge pump (CP) to provide a higher voltage level. The adiabatic CP consists of latch-up and power-saving topologies to enhance its power efficiency. Simulation results show that the dual regulating rectifier has 94.3% voltage conversion efficiency with an ac input magnitude of 3.5 Vp. The power conversion efficiency of the regulated 3.3 V output voltage is 82.3%. The adiabatic CP has an overall voltage conversion efficiency (VCE) of 92.9% with a total on-chip capacitance of 60 pF. The circuit was designed using 180 nm CMOS technology