Quantum-dot Cellular Automata: Review Paper

Quantum-dot Cellular Automata (QCA) is one of the most important discoveries that will be the successful alternative for CMOS technology in the near future. An important feature of this technique, which has attracted the attention of many researchers, is that it is characterized by its low energy consumption, high speed and small size compared with CMOS.  Inverter and majority gate are the basic building blocks for QCA circuits where it can design the most logical circuit using these gates with help of QCA wire. Due to the lack of availability of review papers, this paper will be a destination for many people who are interested in the QCA field and to know how it works and why it had taken lots of attention recentl

Design of Power-Efficient Structures of the CAM Cell using a New Approach in QCA Nanoelectronics Technology

Quantum-dot Cellular Automata (QCA) is a new emerging nano-electronic technology. Owing to its many fa-vorable features such as low energy requirements, high speed, and small size, QCA is being actively suggested as a future CMOS replacement by researchers. Many digital circuits have been introduced in QCA technology, most of them aiming to reach the function with optimum construction in terms of area, cell count and power consumption. The memory circuit is the main building block in the digital system therefore the researchers paid attention to design the memory cells with minimum requirements. In this paper, a new methodology is intro-duced to design two forms of CAM cell. The proposed designs required two 2:1 multiplexers, one OR gate and one inverter. The first proposed design reduces the power consumption by 53.3%, 35% and 25.9% at (0.5 Ek, 1 Ek, and 1.5 Ek) while the second design by 53.2%, 31.9% and 20.5% (0.5 Ek, 1 Ek, and 1.5 Ek) respectively

Designing memory cells with a novel approaches based on a new multiplexer in QCA Technology

Transistor-based CMOS technology has many drawbacks such that it cannot continue to follow the scaling of Moore’s law in the near future. These drawbacks lead researchers to think about alternatives. Quantum-dot Cellular Automata (QCA) is a nanotechnology that has unique features in terms of size and power consumption. QCA has the ability to represent binary numbers by electrons configuration. The memory circuit is a very important part of the digital system. In QCA technology, there are many approaches presented to accomplish memory cells in both RAM and CAM types. CAM is a type of memory used in high-speed applications. In this thesis, novel approaches to design memory cells are proposed. The proposed approaches are based on a 2:1 multiplexer. Using the proposed approach of RAM cell, a singular form of RAM cell (SFRAMC) is accomplished. In QCA technology, researchers strive to design electronic circuits with an emphasis on minimizing important metrics such as cell count, area, delay, cost and power consumption. The SFRAMC demonstrated significant improvements, with a reduction cell count, occupied area and power consumption by 25%, 24% and 36%. In terms of implementation cost, the SFRAMC saves 43% of the cost when compared to the previous best design. On the other hand, by using the proposed approach of CAM cell, two different structures of the QCA-CAM cell have been introduced. The first proposed CAM cell (FPCAMC) gives improvements in terms of cell count, and delay by 15% and 17% respectively. The second proposed CAM cell (SPCAMC) gives improvements in terms of cell count, and delay by 6% and 17% respectively. In terms of total power consumption, both FPCAMC and SPCAMC have an improvement of about 53% over the best-reported design. The above features of the proposed memory cells (RAM and CAM) could pave the road for designing energy-efficient and cost-efficient memory circuits in the future

Implementation of Binary to Gray Code Converters in Quantum Dot Cellular Automata

Quantum dot cellular automaton (QCA) are dominant nanotechnology which has been used extensively in digital circuits and systems. It is a promising alternative to complementary metal–oxide–semiconductor (CMOS) technology with many enticing features such as high-speed, low power consumption and higher switching frequency than transistor based technology. The code converters are the basic unit for transformation of data to execute arithmetic processes. In this paper, QCA based 2-bit binary-to- gray; 3-bit binary-to-gray and 4-bit binary-to-gray code converter have been proposed. The proposed design reduces the number of cells, area and raises switching speed. The simulations are completed using QCADesigner and Microwindlite tool which is widely used for simulation and verification

An optimized 128-bit cellular automata-based hash function for authentication of data at rest and in transit

The cryptographic hash functions are the most fundamental cryptographic concept. These functions are used as basic building blocks for digital signatures and message authentication. Boolean functions are the core of hash functions. These functions are expected to provide pseudo-randomness as well as input sensitivity. Cellular automata are a form of Boolean function that exhibits strong cryptography properties as well as chaotic behavior. This paper proposes a hash function, designed on the principle of cellular automata. The proposed algorithm is secure and meets the requirements for a successful hashing scheme. The hash function has strong statistical and cryptographic characteristics, according to the findings of the avalanche test and the National Institute of Standards and Technology (NIST) Statistical Test Suite. The modularity of different operations of this algorithm makes it suitable for a high-capacity processing environment to produce efficient performance