Systolic array implementation of Euclid's algorithm for inversion and division in GF(2m)

[[abstract]]This paper presents a new systolic VLSI architecture for computing inverses and divisions in finite fields GF(2m) based on a variant of Euclid's algorithm. It is highly regular, modular, and thus well suited to VLSI implementation. It has O(m2) area complexity and can produce one result per clock cycle with a latency of 8m-2 clock cycles. As compared to existing related systolic architectures with the same throughput performance, the proposed one gains a significant improvement in area complexity[[fileno]]2030102030060[[department]]電機工程學

Bit-serial Systolic Array Implementation Of Euclid's Algorithm For Inversion And Division In GF(2/supm)

[[abstract]]This paper presents two serial-in serial-out systolic arrays for inversion or division in GF(2") with the standard basis representation. They can produce results at a rate of one per m cycles after an initial delay of 5m - 4 cycles. The proposed arrays involve unidirectional data flow and are highly regular and modular. Thus, they are well suited to VLSI implemenitation with fault-tolerant design. As compared to existing related systolic designs with the same time complexity and I/O format, our proposed arrays gain a significant improvement in hardware area.[[fileno]]2030102030035[[department]]電機工程學

Bit Serial Systolic Architectures for Multiplicative Inversion and Division over GF(2^m)

Systolic architectures are capable of achieving high throughput by maximizing pipelining and by eliminating global data interconnects. Recursive algorithms with regular data flows are suitable for systolization. The computation of multiplicative inversion using algorithms based on EEA (Extended Euclidean Algorithm) are particularly suitable for systolization. Implementations based on EEA present a high degree of parallelism and pipelinability at bit level which can be easily optimized to achieve local data flow and to eliminate the global interconnects which represent most important bottleneck in todays sub-micron design process. The net result is to have high clock rate and performance based on efficient systolic architectures. This thesis examines high performance but also scalable implementations of multiplicative inversion or field division over Galois fields GF(2m) in the specific case of cryptographic applications where field dimension m may be very large (greater than 400) and either m or defining irreducible polynomial may vary. For this purpose, many inversion schemes with different basis representation are studied and most importantly variants of EEA and binary (Stein's) GCD computation implementations are reviewed. A set of common as well as contrasting characteristics of these variants are discussed. As a result a generalized and optimized variant of EEA is proposed which can compute division, and multiplicative inversion as its subset, with divisor in either polynomial or triangular basis representation. Further results regarding Hankel matrix formation for double-basis inversion is provided. The validity of using the same architecture to compute field division with polynomial or triangular basis representation is proved. Next, a scalable unidirectional bit serial systolic array implementation of this proposed variant of EEA is implemented. Its complexity measures are defined and these are compared against the best known architectures. It is shown that assuming the requirements specified above, this proposed architecture may achieve a higher clock rate performance w. r. t. other designs while being more flexible, reliable and with minimum number of inter-cell interconnects. The main contribution at system level architecture is the substitution of all counter or adder/subtractor elements with a simpler distributed and free of carry propagation delays structure. Further a novel restoring mechanism for result sequences of EEA is proposed using a double delay element implementation. Finally, using this systolic architecture a CMD (Combined Multiplier Divider) datapath is designed which is used as the core of a novel systolic elliptic curve processor. This EC processor uses affine coordinates to compute scalar point multiplication which results in having a very small control unit and negligible with respect to the datapath for all practical values of m. The throughput of this EC based on this bit serial systolic architecture is comparable with designs many times larger than itself reported previously

Novel Single and Hybrid Finite Field Multipliers over GF(2m) for Emerging Cryptographic Systems

With the rapid development of economic and technical progress, designers and users of various kinds of ICs and emerging embedded systems like body-embedded chips and wearable devices are increasingly facing security issues. All of these demands from customers push the cryptographic systems to be faster, more efficient, more reliable and safer. On the other hand, multiplier over GF(2m) as the most important part of these emerging cryptographic systems, is expected to be high-throughput, low-complexity, and low-latency. Fortunately, very large scale integration (VLSI) digital signal processing techniques offer great facilities to design efficient multipliers over GF(2m). This dissertation focuses on designing novel VLSI implementation of high-throughput low-latency and low-complexity single and hybrid finite field multipliers over GF(2m) for emerging cryptographic systems. Low-latency (latency can be chosen without any restriction) high-speed pentanomial basis multipliers are presented. For the first time, the dissertation also develops three high-throughput digit-serial multipliers based on pentanomials. Then a novel realization of digit-level implementation of multipliers based on redundant basis is introduced. Finally, single and hybrid reordered normal basis bit-level and digit-level high-throughput multipliers are presented. To the authors knowledge, this is the first time ever reported on multipliers with multiple throughput rate choices. All the proposed designs are simple and modular, therefore suitable for VLSI implementation for various emerging cryptographic systems

Multiple bit error correcting architectures over finite fields

This thesis proposes techniques to mitigate multiple bit errors in GF arithmetic circuits. As GF arithmetic circuits such as multipliers constitute the complex and important functional unit of a crypto-processor, making them fault tolerant will improve the reliability of circuits that are employed in safety applications and the errors may cause catastrophe if not mitigated. Firstly, a thorough literature review has been carried out. The merits of efficient schemes are carefully analyzed to study the space for improvement in error correction, area and power consumption. Proposed error correction schemes include bit parallel ones using optimized BCH codes that are useful in applications where power and area are not prime concerns. The scheme is also extended to dynamically correcting scheme to reduce decoder delay. Other method that suits low power and area applications such as RFIDs and smart cards using cross parity codes is also proposed. The experimental evaluation shows that the proposed techniques can mitigate single and multiple bit errors with wider error coverage compared to existing methods with lesser area and power consumption. The proposed scheme is used to mask the errors appearing at the output of the circuit irrespective of their cause. This thesis also investigates the error mitigation schemes in emerging technologies (QCA, CNTFET) to compare area, power and delay with existing CMOS equivalent. Though the proposed novel multiple error correcting techniques can not ensure 100% error mitigation, inclusion of these techniques to actual design can improve the reliability of the circuits or increase the difficulty in hacking crypto-devices. Proposed schemes can also be extended to non GF digital circuits

Multibody dynamics 2015

This volume contains the full papers accepted for presentation at the ECCOMAS Thematic Conference on Multibody Dynamics 2015 held in the Barcelona School of Industrial Engineering, Universitat Politècnica de Catalunya, on June 29 - July 2, 2015. The ECCOMAS Thematic Conference on Multibody Dynamics is an international meeting held once every two years in a European country. Continuing the very successful series of past conferences that have been organized in Lisbon (2003), Madrid (2005), Milan (2007), Warsaw (2009), Brussels (2011) and Zagreb (2013); this edition will once again serve as a meeting point for the international researchers, scientists and experts from academia, research laboratories and industry working in the area of multibody dynamics. Applications are related to many fields of contemporary engineering, such as vehicle and railway systems, aeronautical and space vehicles, robotic manipulators, mechatronic and autonomous systems, smart structures, biomechanical systems and nanotechnologies. The topics of the conference include, but are not restricted to: Formulations and Numerical Methods, Efficient Methods and Real-Time Applications, Flexible Multibody Dynamics, Contact Dynamics and Constraints, Multiphysics and Coupled Problems, Control and Optimization, Software Development and Computer Technology, Aerospace and Maritime Applications, Biomechanics, Railroad Vehicle Dynamics, Road Vehicle Dynamics, Robotics, Benchmark Problems. The conference is organized by the Department of Mechanical Engineering of the Universitat Politècnica de Catalunya (UPC) in Barcelona. The organizers would like to thank the authors for submitting their contributions, the keynote lecturers for accepting the invitation and for the quality of their talks, the awards and scientific committees for their support to the organization of the conference, and finally the topic organizers for reviewing all extended abstracts and selecting the awards nominees.Postprint (published version

The molecular epidemiology of trypanosoma cruzi infection in wild and domestic transmission cycles with special emphasis on multilocus microsatellite analysis

Trypanosoma cruzi is a zoonotic vector-bome unicellular parasite, with a highly complex silvatic ecology, and native to the Americas. Substantial genetic diversity has been identified in T. cruzi populations, with six phylogenetic groups or Discrete Typing Groups (DTUs) commonly recognised: TCI, TCIIa, TCIIb, TCIIc, TCIId, and TCIIe. The silvatic affinities of these groups are poorly defined, although broad associations between some lineages and distinct ecological niches are recognised. Additionally, a number of studies have demonstrated a degree of within-DTU diversity, and the current classification may be a poor reflection of the total diversity present. In this PhD thesis the genetic diversity of silvatic T. cruzi is examined, in conjunction with a limited number of domestic strains, to investigate the underlying ecological and epidemiological phenomena that dictate the population genetic structure of this parasite. >200 new T. cruzi and Trypanosoma rangeli isolates, including those from silvatic mammals, domestic and peridomestic triatomine bugs, were collected during fieldwork in Venezuela and Bolivia. Where possible, these isolates were genotyped to a DTU level, and the epidemiological significance of these data discussed. Original silvatic genotype data from this study were then compiled with >1000, historical records (1981-2007) for both mammals and triatomines. This dataset was subjected to basic statistical analysis, and strong support found for an association between parasite genotype, silvatic niche, and triatomine vector. Within-DTU genetic diversity was established for ~200 isolates from two widespread silvatic genotypes, TCI and TCIIc, using a genome-wide panel of 49 microsatellite markers, in tandem with sequence analysis. Substantial genetic diversity was identified in both lineages, coincident with weak spatial structuring. The possibility a population bottleneck was investigated within TCI derived from Andean rodent populations. Moreover, the possibility of a bottleneck was also examined in geographically dispersed human TCI isolates taken from lowland Venezuela. Associated epidemiological implications are discussed. Genetic diversity in TCI was additionally examined at a within-host level. A total of 211 clones were taken from eight mammals, and analysed using a subset of microsatellite markers. Again substantial genetic diversity was evident, with stable infection of the same mammal by a number of different stains. Limited evidence of genetic exchange was also observed, but could not be confirmed, and the implications of this are also discussed