A Compressive Sensing Assisted Massive SM-VBLAST System: Error Probability and Capacity Analysis

The concept of massive spatial modulation (SM) assisted vertical bell labs space-time (V-BLAST) (SM-VBLAST) system [1] is proposed, where SM symbols (instead of conventional constellation symbols) are mapped onto the VBLAST structure. We show that the proposed SM-VBLAST is a promising massive multiple input multiple output (MIMO) candidate owing to its high throughput and low number of radio frequency (RF) chains used at the transmitter. For the generalized massive SM-VBLAST systems, we first derive both the upper bounds of the average bit error probability (ABEP) and the lower bounds of the ergodic capacity. Then, we develop an efficient error correction mechanism (ECM) assisted compressive sensing (CS) detector whose performance tends to achieve that of the maximum likelihood (ML) detector. Our simulations indicate that the proposed ECM-CS detector is suitable both for massive SM-MIMO based point-to-point and for uplink communications at the cost of a slightly higher complexity than that of the compressive sampling matching pursuit (CoSaMP) based detector in the high SNR region

Compressive Sensing-Based Grant-Free Massive Access for 6G Massive Communication

The advent of the sixth-generation (6G) of wireless communications has given rise to the necessity to connect vast quantities of heterogeneous wireless devices, which requires advanced system capabilities far beyond existing network architectures. In particular, such massive communication has been recognized as a prime driver that can empower the 6G vision of future ubiquitous connectivity, supporting Internet of Human-Machine-Things for which massive access is critical. This paper surveys the most recent advances toward massive access in both academic and industry communities, focusing primarily on the promising compressive sensing-based grant-free massive access paradigm. We first specify the limitations of existing random access schemes and reveal that the practical implementation of massive communication relies on a dramatically different random access paradigm from the current ones mainly designed for human-centric communications. Then, a compressive sensing-based grant-free massive access roadmap is presented, where the evolutions from single-antenna to large-scale antenna array-based base stations, from single-station to cooperative massive multiple-input multiple-output systems, and from unsourced to sourced random access scenarios are detailed. Finally, we discuss the key challenges and open issues to shed light on the potential future research directions of grant-free massive access.Comment: Accepted by IEEE IoT Journa

Low-complexity compressive sensing detection for spatial modulation in large-scale multiple access channels

In this paper, we propose a detector, based on the compressive sensing (CS) principles, for multiple-access spatial modulation (SM) channels with a large-scale antenna base station (BS). Particularly, we exploit the use of a large number of antennas at the BSs and the structure and sparsity of the SM transmitted signals to improve the performance of conventional detection algorithms. Based on the above, we design a CS-based detector that allows the reduction of the signal processing load at the BSs particularly pronounced for SM in large-scale multiple-input-multiple-output (MIMO) systems. We further carry out analytical performance and complexity studies of the proposed scheme to evaluate its usefulness. The theoretical and simulation results presented in this paper show that the proposed strategy constitutes a low-complexity alternative to significantly improve the system's energy efficiency against conventional MIMO detection in the multiple-access channel

Energy-Efficient System Design for Future Wireless Communications

The exponential growth of wireless data traffic has caused a significant increase in the power consumption of wireless communications systems due to the higher complexity of the transceiver structures required to establish the communication links. For this reason, in this Thesis we propose and characterize technologies for improving the energy efficiency of multiple-antenna wireless communications. This Thesis firstly focuses on energy-efficient transmission schemes and commences by introducing a scheme for alleviating the power loss experienced by the Tomlinson-Harashima precoder, by aligning the interference of a number of users with the symbols to transmit. Subsequently, a strategy for improving the performance of space shift keying transmission via symbol pre-scaling is presented. This scheme re-formulates complex optimization problems via semidefinite relaxation to yield problem formulations that can be efficiently solved. In a similar line, this Thesis designs a signal detection scheme based on compressive sensing to improve the energy efficiency of spatial modulation systems in multiple access channels. The proposed technique relies on exploiting the particular structure and sparsity that spatial modulation systems inherently possess to enhance performance. This Thesis also presents research carried out with the aim of reducing the hardware complexity and associated power consumption of large scale multiple-antenna base stations. In this context, the employment of incomplete channel state information is proposed to achieve the above-mentioned objective in correlated communication channels. The candidate’s work developed in Bell Labs is also presented, where the feasibility of simplified hardware architectures for massive antenna systems is assessed with real channel measurements. Moreover, a strategy for reducing the hardware complexity of antenna selection schemes by simplifying the design of the switching procedure is also analyzed. Overall, extensive theoretical and simulation results support the improved energy efficiency and complexity of the proposed schemes, towards green wireless communications systems

Algorithm Development and VLSI Implementation of Energy Efficient Decoders of Polar Codes

With its low error-floor performance, polar codes attract significant attention as the potential standard error correction code (ECC) for future communication and data storage. However, the VLSI implementation complexity of polar codes decoders is largely influenced by its nature of in-series decoding. This dissertation is dedicated to presenting optimal decoder architectures for polar codes. This dissertation addresses several structural properties of polar codes and key properties of decoding algorithms that are not dealt with in the prior researches. The underlying concept of the proposed architectures is a paradigm that simplifies and schedules the computations such that hardware is simplified, latency is minimized and bandwidth is maximized. In pursuit of the above, throughput centric successive cancellation (TCSC) and overlapping path list successive cancellation (OPLSC) VLSI architectures and express journey BP (XJBP) decoders for the polar codes are presented. An arbitrary polar code can be decomposed by a set of shorter polar codes with special characteristics, those shorter polar codes are referred to as constituent polar codes. By exploiting the homogeneousness between decoding processes of different constituent polar codes, TCSC reduces the decoding latency of the SC decoder by 60% for codes with length n = 1024. The error correction performance of SC decoding is inferior to that of list successive cancellation decoding. The LSC decoding algorithm delivers the most reliable decoding results; however, it consumes most hardware resources and decoding cycles. Instead of using multiple instances of decoding cores in the LSC decoders, a single SC decoder is used in the OPLSC architecture. The computations of each path in the LSC are arranged to occupy the decoder hardware stages serially in a streamlined fashion. This yields a significant reduction of hardware complexity. The OPLSC decoder has achieved about 1.4 times hardware efficiency improvement compared with traditional LSC decoders. The hardware efficient VLSI architectures for TCSC and OPLSC polar codes decoders are also introduced. Decoders based on SC or LSC algorithms suffer from high latency and limited throughput due to their serial decoding natures. An alternative approach to decode the polar codes is belief propagation (BP) based algorithm. In BP algorithm, a graph is set up to guide the beliefs propagated and refined, which is usually referred to as factor graph. BP decoding algorithm allows decoding in parallel to achieve much higher throughput. XJBP decoder facilitates belief propagation by utilizing the specific constituent codes that exist in the conventional factor graph, which results in an express journey (XJ) decoder. Compared with the conventional BP decoding algorithm for polar codes, the proposed decoder reduces the computational complexity by about 40.6%. This enables an energy-efficient hardware implementation. To further explore the hardware consumption of the proposed XJBP decoder, the computations scheduling is modeled and analyzed in this dissertation. With discussions on different hardware scenarios, the optimal scheduling plans are developed. A novel memory-distributed micro-architecture of the XJBP decoder is proposed and analyzed to solve the potential memory access problems of the proposed scheduling strategy. The register-transfer level (RTL) models of the XJBP decoder are set up for comparisons with other state-of-the-art BP decoders. The results show that the power efficiency of BP decoders is improved by about 3 times

Algorithm Development and VLSI Implementation of Energy Efficient Decoders of Polar Codes

With its low error-floor performance, polar codes attract significant attention as the potential standard error correction code (ECC) for future communication and data storage. However, the VLSI implementation complexity of polar codes decoders is largely influenced by its nature of in-series decoding. This dissertation is dedicated to presenting optimal decoder architectures for polar codes. This dissertation addresses several structural properties of polar codes and key properties of decoding algorithms that are not dealt with in the prior researches. The underlying concept of the proposed architectures is a paradigm that simplifies and schedules the computations such that hardware is simplified, latency is minimized and bandwidth is maximized. In pursuit of the above, throughput centric successive cancellation (TCSC) and overlapping path list successive cancellation (OPLSC) VLSI architectures and express journey BP (XJBP) decoders for the polar codes are presented. An arbitrary polar code can be decomposed by a set of shorter polar codes with special characteristics, those shorter polar codes are referred to as constituent polar codes. By exploiting the homogeneousness between decoding processes of different constituent polar codes, TCSC reduces the decoding latency of the SC decoder by 60% for codes with length n = 1024. The error correction performance of SC decoding is inferior to that of list successive cancellation decoding. The LSC decoding algorithm delivers the most reliable decoding results; however, it consumes most hardware resources and decoding cycles. Instead of using multiple instances of decoding cores in the LSC decoders, a single SC decoder is used in the OPLSC architecture. The computations of each path in the LSC are arranged to occupy the decoder hardware stages serially in a streamlined fashion. This yields a significant reduction of hardware complexity. The OPLSC decoder has achieved about 1.4 times hardware efficiency improvement compared with traditional LSC decoders. The hardware efficient VLSI architectures for TCSC and OPLSC polar codes decoders are also introduced. Decoders based on SC or LSC algorithms suffer from high latency and limited throughput due to their serial decoding natures. An alternative approach to decode the polar codes is belief propagation (BP) based algorithm. In BP algorithm, a graph is set up to guide the beliefs propagated and refined, which is usually referred to as factor graph. BP decoding algorithm allows decoding in parallel to achieve much higher throughput. XJBP decoder facilitates belief propagation by utilizing the specific constituent codes that exist in the conventional factor graph, which results in an express journey (XJ) decoder. Compared with the conventional BP decoding algorithm for polar codes, the proposed decoder reduces the computational complexity by about 40.6%. This enables an energy-efficient hardware implementation. To further explore the hardware consumption of the proposed XJBP decoder, the computations scheduling is modeled and analyzed in this dissertation. With discussions on different hardware scenarios, the optimal scheduling plans are developed. A novel memory-distributed micro-architecture of the XJBP decoder is proposed and analyzed to solve the potential memory access problems of the proposed scheduling strategy. The register-transfer level (RTL) models of the XJBP decoder are set up for comparisons with other state-of-the-art BP decoders. The results show that the power efficiency of BP decoders is improved by about 3 times

Sparsity Signal Detection for Indoor GSSK-VLC System

In this paper, the signal detection problem in indoor visible light communication (VLC) system aided by generalized space shift keying (GSSK) is modeled as a sparse signal reconstruction problem, which has lower computational complexity by exploiting the sparse reconstruction algorithms in compressed sensing (CS). In order to satisfy the measurement matrix property to perform sparse signal reconstruction, a preprocessing approach of measurement matrix is proposed based on singular value decomposition (SVD), which theoretically guarantees the feasibility of utilizing CS based sparse signal detection method in indoor GSSK-VLC system. Then, by adopting classical orthogonal matching pursuit (OMP) algorithm and compressed sampling matching pursuit (CoSaMP) algorithm, the GSSK signals are efficiently detected in the considered indoor GSSK-VLC system. Furthermore, a more efficient detection algorithm combined with OMP and maximum likelihood (ML) is also presented especially for SSK scenario. Finally, the effectiveness of the proposed sparsity aided detection algorithms in indoor GSSK-VLC system are verified by computer simulations. The results show that the proposed algorithms can achieve better bit error rate (BER) and lower computation complexity than ML based detection method. Specifically, a signal-to-noise ratio (SNR) gain as high as 12 dB is observed in the SSK scenario and about 5 dB in case of a GSSK scenario upon employing our proposed detection methods