Design of Ternary Memory Cell Using QDGFET

Ternary logic is a promising option to conventional binary logic because it can handle higher information in less number of gate count. Less number of gates requires less area in a chip which is equivalent to gold in today’s nano scale circuits. A novel design of a ternary memory cell based on QDGFETs is proposed. Memory cell is made of two back to back connected inverters. It is the conventional 6T memory cell design. Main advantage of QDGFET is that it can be used directly by replacing CMOS in the circuit without making any changes. Embedded memory requires the largest share of area in modern high-performance circuit designs. As the technology progresses the demand for high capacity memories also increases. So to fulfil this demand, researchers are trying to come up with new technology and solutions. The use of ternary logic instead of binary logic is a possible solution. So in this paper I have designed a ternary memory cell which stores one bit of ternary logic data

Investigation of Multiple-valued Logic Technologies for Beyond-binary Era

Computing technologies are currently based on the binary logic/number system, which is dependent on the simple on and off switching mechanism of the prevailing transistors. With the exponential increase of data processing and storage needs, there is a strong push to move to a higher radix logic/number system that can eradicate or lessen many limitations of the binary system. Anticipated saturation of Moore’s law and the necessity to increase information density and processing speed in the future micro and nanoelectronic circuits and systems provide a strong background and motivation for the beyond-binary logic system. In this review article, different technologies for Multiple-valued-Logic (MVL) devices and the associated prospects and constraints are discussed. The feasibility of the MVL system in real-world applications rests on resolving two major challenges: (i) development of an efficient mathematical approach to implement the MVL logic using available technologies, and (ii) availability of effective synthesis techniques. This review of different technologies for the MVL system is intended to perform a comprehensive investigation of various MVL technologies and a comparative analysis of the feasible approaches to implement MVL devices, especially ternary logic

Technological Solution beyond MOSFET and Binary Logic Device

Title from PDF of title page viewed January 31, 2019Thesis advisor: Masud ChowdhuryVitaIncludes bibliographical references (pages 64-70)Thesis (M.S.)--School of Computing and Engineering, University of Missouri--Kansas City, 2018Today’s technology is based on the binary number system-based circuitry, which is the outcome of the simple on and off switching mechanism of the prevailing transistors. Consideration of higher radix number system can eradicate or lessen many limitations of binary number system such as the saturation of Moore’s law. The most substantial potential benefits of higher radix approaches are the decrease of wiring complexity. Excessive scaling of the technologies has led the researchers beyond Binary Logic and MOSFET technology. TFET considered as one of the most promising options for low-power application for beyond MOSFET technologies. Graphene Nano Ribbon, due to its high-carrier mobility, tunable bandgap and its outstanding electrostatic control of device gate becomes ideal choice for channel material of TFET. This paper proposes double gated ultra-thin body (UTB) TFET device model using Graphene nano ribbon as the channel material. In this paper evaluation of the model by performing the comparative analysis with InAs as the channel material in terms of Ec-Ev on and off state and Id-Vg characteristics is presented. The feasibility of multi valued logic system in real-world rests on two serious aspects, such as, the easiness of mathematical approach for implementing the multivalued logic into today’s technology and the sufficiency of synthesis techniques. In this paper, we have focused on the different technology available for implementing multivalued logic especially ternary logic. Ternary logic devices are expected to lead to an exponential increase of the information handling capability, which binary logic cannot support. Memory capacitor or memcapacitor is an emerging device that exhibits hysteresis behavior, which can be manipulated by external parameters, such as, the applied electric field or voltage. One of the unique properties of the memcapacitor is that by using the percolation approach, we can achieve Metal-Insulator-Transition (MIT) phenomenon, which can be utilized to obtain a staggered hysteresis loop. For multivalued logic devices staggered hysteresis behavior is the critical requirement. In this paper, we propose a new conceptual design of a ternary logic device by vertically stacking dielectric material interleaved with layers of graphene nanoribbon (GNR) between two external metal plates. The proposed device structure displays the memcapacitive behavior with the fast switching metal-to-insulator transition in picosecond scale. The device model is later extended into a vertical-cascaded version, which acts as a ternary device.Introduction -- Multi valued logic -- Overview of different MVL technologies -- Graphene memcapacitor based ternary logic device -- Graphene nano ribbon based TFET -- Conclusion and future wor