Combinational multiple-valued circuit design by generalised disjunctive decomposition

A design of multiple-valued circuits based on the multiple-valued programmable logic arrays (MV PLA’s) by generalized disjunctive decomposition is presented. Main subjects are 1) Generalized disjunctive decomposition of multiple-valued functions using multiple-terminal multiplevalued decision diagrams (MTMDD’s); 2) Realization of functions by MV PLA-based combinatorial circuits

Interpolation Methods for Binary and Multivalued Logical Quantum Gate Synthesis

A method for synthesizing quantum gates is presented based on interpolation methods applied to operators in Hilbert space. Starting from the diagonal forms of specific generating seed operators with non-degenerate eigenvalue spectrum one obtains for arity-one a complete family of logical operators corresponding to all the one-argument logical connectives. Scaling-up to n-arity gates is obtained by using the Kronecker product and unitary transformations. The quantum version of the Fourier transform of Boolean functions is presented and a Reed-Muller decomposition for quantum logical gates is derived. The common control gates can be easily obtained by considering the logical correspondence between the control logic operator and the binary propositional logic operator. A new polynomial and exponential formulation of the Toffoli gate is presented. The method has parallels to quantum gate-T optimization methods using powers of multilinear operator polynomials. The method is then applied naturally to alphabets greater than two for multi-valued logical gates used for quantum Fourier transform, min-max decision circuits and multivalued adders

Multiple-Valued Structures of Intellectual Systems

The basic construction concepts of many-valued intellectual systems, which are adequate to primal problems of person activity and using hybrid tools with many-valued intellectual systems being two-place, but simulating neuron processes of space toting which are different on a level of actions, inertial and threshold of properties of neuron diaphragms, and also frequency modification of the following transmitted messages are created. All enumerated properties and functions in point of fact are essential not only are discrete on time, but also many-valued

Some aspects of an evolvable hardware approach for multiple-valued combinational circuit design

In this paper a gate-level evolvable hardware technique for designing multiple-valued (MV) combinational circuits is proposed for the first time. In comparison with the decomposition techniques used for synthesis of combinational circuits previously employed, this new approach is easily adapted for the different types of MV gates associated with operations corresponding to different algebra types and can include other more complex logical expressions (e.g. singlecontrol MV multiplexer called T-gate). The technique is based on evolving the functionality and connectivity of a rectangular array of logic cells. The experimental results show how the success of genetic algorithm depends on the number of columns, the number of rows in circuit structure and levels-back parameter (the number of columns to the left of current cell to which cell input may be connected). We show that the choice of the set of MV gates used radically affects the chances of successful evolution (in terms of number of 100% functional solutions found)

Design of Low Power MAX Operator for Multi-valued Logic System

AbstractA voltage-mode three transistor based MAX circuit for implementation of multi-valued logic (MVL) system is proposed in this paper. The proposed MAX operates at very low power consumption ranging in micro watts. To evaluate MAX performance, a NOR gate realization is done and compared to standard CMOS NOR gate. The HSpice simulation result confirms the MAX based NOR gate to operate with minimal delay at low power level. The simulations have been performed on 180nm technology