13 research outputs found

    The Quasigroup Block Cipher and its Analysis

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    This thesis discusses the Quasigroup Block Cipher (QGBC) and its analysis. We first present the basic form of the QGBC and then follow with improvements in memory consumption and security. As a means of analyzing the system, we utilize tools such as the NIST Statistical Test Suite, auto and crosscorrelation, then linear and algebraic cryptanalysis. Finally, as we review the results of these analyses, we propose improvements and suggest an algorithm suitable for low-cost FPGA implementation

    A Quasigroup Based Random Number Generator for Resource Constrained Environments

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    This paper proposes a pseudo random number generator (PRNG) based on quasigroups. The proposed PRNG has low memory requirements, is autonomous and the quality of the output stream of random numbers is better than other available standard PRNG implementations (commercial and open source) in majority of the tests. Comparisons are done using the benchmark NIST Statistical Test Suite and compression tools. Results are presented for quality of raw stream of random numbers and for encryption results using these random numbers

    Cryptography Using Quasi Group and Chaotic Maps

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    In this paper a symmetric key (stream cipher mode/block cipher mode) cryptosystem is proposed, involving chaotic maps and quasi group. The proposed cryptosystem destroys any existing patterns in the input, and also, it maximizes entropy. Moreover, the n-grams illustrate that the proposed cryptosystem is secure against the statistics analysis. Furthermore, Experimental results show that the ciphertext has good diffusion and confusion properties with respect to the plaintext and the key, also the results demonstrate that the block cipher mode gives higher entropy than the steam cipher mode

    Efficient architectures of heterogeneous fpga-gpu for 3-d medical image compression

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    The advent of development in three-dimensional (3-D) imaging modalities have generated a massive amount of volumetric data in 3-D images such as magnetic resonance imaging (MRI), computed tomography (CT), positron emission tomography (PET), and ultrasound (US). Existing survey reveals the presence of a huge gap for further research in exploiting reconfigurable computing for 3-D medical image compression. This research proposes an FPGA based co-processing solution to accelerate the mentioned medical imaging system. The HWT block implemented on the sbRIO-9632 FPGA board is Spartan 3 (XC3S2000) chip prototyping board. Analysis and performance evaluation of the 3-D images were been conducted. Furthermore, a novel architecture of context-based adaptive binary arithmetic coder (CABAC) is the advanced entropy coding tool employed by main and higher profiles of H.264/AVC. This research focuses on GPU implementation of CABAC and comparative study of discrete wavelet transform (DWT) and without DWT for 3-D medical image compression systems. Implementation results on MRI and CT images, showing GPU significantly outperforming single-threaded CPU implementation. Overall, CT and MRI modalities with DWT outperform in term of compression ratio, peak signal to noise ratio (PSNR) and latency compared with images without DWT process. For heterogeneous computing, MRI images with various sizes and format, such as JPEG and DICOM was implemented. Evaluation results are shown for each memory iteration, transfer sizes from GPU to CPU consuming more bandwidth or throughput. For size 786, 486 bytes JPEG format, both directions consumed bandwidth tend to balance. Bandwidth is relative to the transfer size, the larger sizing will take more latency and throughput. Next, OpenCL implementation for concurrent task via dedicated FPGA. Finding from implementation reveals, OpenCL on batch procession mode with AOC techniques offers substantial results where the amount of logic, area, register and memory increased proportionally to the number of batch. It is because of the kernel will copy the kernel block refer to batch number. Therefore memory bank increased periodically related to kernel block. It was found through comparative study that the tree balance and unroll loop architecture provides better achievement, in term of local memory, latency and throughput

    MS FT-2-2 7 Orthogonal polynomials and quadrature: Theory, computation, and applications

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    Quadrature rules find many applications in science and engineering. Their analysis is a classical area of applied mathematics and continues to attract considerable attention. This seminar brings together speakers with expertise in a large variety of quadrature rules. It is the aim of the seminar to provide an overview of recent developments in the analysis of quadrature rules. The computation of error estimates and novel applications also are described
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