On the variance of sums of arithmetic functions over primes in short intervals and pair correlation for L-functions in the Selberg class

We establish the equivalence of conjectures concerning the pair correlation of zeros of $L$-functions in the Selberg class and the variances of sums of a related class of arithmetic functions over primes in short intervals. This extends the results of Goldston & Montgomery [7] and Montgomery & Soundararajan [11] for the Riemann zeta-function to other $L$-functions in the Selberg class. Our approach is based on the statistics of the zeros because the analogue of the Hardy-Littlewood conjecture for the auto-correlation of the arithmetic functions we consider is not available in general. One of our main findings is that the variances of sums of these arithmetic functions over primes in short intervals have a different form when the degree of the associated $L$-functions is 2 or higher to that which holds when the degree is 1 (e.g. the Riemann zeta-function). Specifically, when the degree is 2 or higher there are two regimes in which the variances take qualitatively different forms, whilst in the degree-1 case there is a single regime

The variance of the number of prime polynomials in short intervals and in residue classes

We resolve a function field version of two conjectures concerning the variance of the number of primes in short intervals (Goldston and Montgomery) and in arithmetic progressions (Hooley). A crucial ingredient in our work are recent equidistribution results of N. Katz.Comment: Revised according to referees' comment

An algorithmic and architectural study on Montgomery exponentiation in RNS

The modular exponentiation on large numbers is computationally intensive. An effective way for performing this operation consists in using Montgomery exponentiation in the Residue Number System (RNS). This paper presents an algorithmic and architectural study of such exponentiation approach. From the algorithmic point of view, new and state-of-the-art opportunities that come from the reorganization of operations and precomputations are considered. From the architectural perspective, the design opportunities offered by well-known computer arithmetic techniques are studied, with the aim of developing an efficient arithmetic cell architecture. Furthermore, since the use of efficient RNS bases with a low Hamming weight are being considered with ever more interest, four additional cell architectures specifically tailored to these bases are developed and the tradeoff between benefits and drawbacks is carefully explored. An overall comparison among all the considered algorithmic approaches and cell architectures is presented, with the aim of providing the reader with an extensive overview of the Montgomery exponentiation opportunities in RNS

Implementation of modular arithmetic in FPGAs and ASICs

Táto práca sa zaoberá analýzou, návrhom a implementáciou modulárnej aritmetiky do obvodov FPGA a ASIC. Jej hlavným cieľom je vytvoriť knižnicu syntetizovateľných funkcií v jazyku C++/SystemC pre operácie v modulárnej aritmetike s využitím Montgomeryho redukcie a porovnať výsledky implementácie s klasickými algoritmami.This thesis is focused on analysis, design and implementation of modular arithmetic in FPGAs and ASICs. Its main objective is to create a C++/SystemC library, that contains synthesizable functions for operations with Montgomery reduction in modular arithmetic. Results of the implementation of Montgomery reduction are compared with results of classic algorithms for modular arithmetic.

Montgomery Algorithm Implementation on an Embedded System for a 256-bit Input Size

The Montgomery multiplication is a leading method to compute modular multiplications faster over large prime fields. Numerous algorithms in number theory use Montgomery multiplication computations. This fast data processing makes it appealing to cryptosystem analysis. The objective of this work is to implement the Montgomery algorithm on an embedded system. For this application, the following 256-bit arithmetic functions were executed in the MCUXpresso IDE software: adder, subtraction, multiplication, and Barret reduction. The obtained results in the FRDM-K64F board show the Montgomery form values, and the product out of the Montgomery domain. The operations computed in the embedded board also demonstrate that the applied algorithms are congruent with the values obtained in C programming, Python, and the FRDM-K64F board.ITESO, A. C

EMBEDDING RESIDUE ARITHMETIC INTO MODULAR MULTIPLICATION FOR INTEGERS AND POLYNOMIALS

A brand new methodology for embedding residue arithmetic inside a dual-field Montgomery modular multiplication formula for integers in as well as for polynomials was presented within this project. A design methodology for incorporating Residue Number System (RNS) and Polynomial Residue Number System (PRNS) in Montgomery modular multiplication in GF (p) or GF (2n) correspondingly, in addition to VLSI architecture of the dual-field residue arithmetic Montgomery multiplier are presented within this paper. In cryptographic applications to engender the public and private keys we suffer from the arithmetic operations like advisement, subtraction and multiplication. An analysis of input/output conversions to/from residue representation, combined with the suggested residue Montgomery multiplication formula, reveals prevalent multiply-accumulate data pathways both between your converters and backward and forward residue representations