29 research outputs found

    Lower Bounds for DeMorgan Circuits of Bounded Negation Width

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    We consider Boolean circuits over {or, and, neg} with negations applied only to input variables. To measure the "amount of negation" in such circuits, we introduce the concept of their "negation width". In particular, a circuit computing a monotone Boolean function f(x_1,...,x_n) has negation width w if no nonzero term produced (purely syntactically) by the circuit contains more than w distinct negated variables. Circuits of negation width w=0 are equivalent to monotone Boolean circuits, while those of negation width w=n have no restrictions. Our motivation is that already circuits of moderate negation width w=n^{epsilon} for an arbitrarily small constant epsilon>0 can be even exponentially stronger than monotone circuits. We show that the size of any circuit of negation width w computing f is roughly at least the minimum size of a monotone circuit computing f divided by K=min{w^m,m^w}, where m is the maximum length of a prime implicant of f. We also show that the depth of any circuit of negation width w computing f is roughly at least the minimum depth of a monotone circuit computing f minus log K. Finally, we show that formulas of bounded negation width can be balanced to achieve a logarithmic (in their size) depth without increasing their negation width

    Shrinkage of Decision Lists and DNF Formulas

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    We establish nearly tight bounds on the expected shrinkage of decision lists and DNF formulas under the p-random restriction R_p for all values of p ? [0,1]. For a function f with domain {0,1}?, let DL(f) denote the minimum size of a decision list that computes f. We show that E[DL(f ? R_p)] ? DL(f)^log_{2/(1-p)}((1+p)/(1-p)). For example, this bound is ?{DL(f)} when p = ?5-2 ? 0.24. For Boolean functions f, we obtain the same shrinkage bound with respect to DNF formula size plus 1 (i.e., replacing DL(?) with DNF(?)+1 on both sides of the inequality)

    36th International Symposium on Theoretical Aspects of Computer Science: STACS 2019, March 13-16, 2019, Berlin, Germany

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    A Super-Quadratic Lower Bound for Depth Four Arithmetic Circuits

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    Satisfiability on Mixed Instances

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    Sum-of-Squares Lower Bounds for the Minimum Circuit Size Problem

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    We prove lower bounds for the Minimum Circuit Size Problem (MCSP) in the Sum-of-Squares (SoS) proof system. Our main result is that for every Boolean function f:{0,1}n→{0,1}f: \{0,1\}^n \rightarrow \{0,1\}, SoS requires degree Ω(s1−ϵ)\Omega(s^{1-\epsilon}) to prove that ff does not have circuits of size ss (for any s>poly(n)s > \mathrm{poly}(n)). As a corollary we obtain that there are no low degree SoS proofs of the statement NP ⊈\not \subseteq P/poly. We also show that for any 0<α<10 < \alpha < 1 there are Boolean functions with circuit complexity larger than 2nα2^{n^{\alpha}} but SoS requires size 22Ω(nα)2^{2^{\Omega(n^{\alpha})}} to prove this. In addition we prove analogous results on the minimum \emph{monotone} circuit size for monotone Boolean slice functions. Our approach is quite general. Namely, we show that if a proof system QQ has strong enough constraint satisfaction problem lower bounds that only depend on good expansion of the constraint-variable incidence graph and, furthermore, QQ is expressive enough that variables can be substituted by local Boolean functions, then the MCSP problem is hard for QQ.Comment: A conference version appeared previously in CCC'2

    Pseudorandomness from Shrinkage

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    One powerful theme in complexity theory and pseudorandomness in the past few decades has been the use lower bounds to give pseudorandom generators (PRGs). However, the general results using this hardness vs. randomness paradigm suffer a quantitative loss in parameters, and hence do not give nontrivial implications for models where we don’t know super-polynomial lower bounds but do know lower bounds of a fixed polynomial. We show that when such lower bounds are proved using random restrictions, we can construct PRGs which are essentially best possible without in turn improving the lower bounds. More specifically, say that a circuit family has shrinkage exponent Γ if a random restriction leaving a p fraction of variables unset shrinks the size of any circuit in the family by a factor of pΓ+o(1). Our PRG uses a seed of length s1/(Γ+1)+o(1) to fool circuits in the family of size s. By using this generic construction, we get PRGs with polynomially small error for the following classes of circuits of size s and with the following seed lengths: 1. For de Morgan formulas, seed length s1/3+o(1); 2. For formulas over an arbitrary basis, seed length s1/2+o(1); 3. For read-once de Morgan formulas, seed length s.234...; 4. For branching programs of size s, seed length s1/2+o(1). The previous best PRGs known for these classes used seeds of length bigger than n/2 to output n bits, and worked only when the size s = O(n) [BPW11]
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