15,618 research outputs found

    High stability amplifier

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    An electrical RF signal amplifier for providing high temperature stability and RF isolation and comprised of an integrated circuit voltage regulator, a single transistor, and an integrated circuit operational amplifier mounted on a circuit board such that passive circuit elements are located on side of the circuit board while the active circuit elements are located on the other side is described. The active circuit elements are embedded in a common heat sink so that a common temperature reference is provided for changes in ambient temperature. The single transistor and operational amplifier are connected together to form a feedback amplifier powered from the voltage regulator with transistor implementing primarily the desired signal gain while the operational amplifier implements signal isolation. Further RF isolation is provided by the voltage regulator which inhibits cross-talk from other like amplifiers powered from a common power supply. Input and output terminals consisting of coaxial connectors are located on the sides of a housing in which all the circuit components and heat sink are located

    Design of an output-capacitorless low-dropout regulator for power management applications

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    This article aims to present the design of a 4.5-V, 450-mA low drop-out (LDO) voltage linear regulator based on a twostage cascoded operational transconductance amplifier (OTA) as error amplifier. The aforementioned two-stage OTA is designed with cascoded current mirroring technique to boost up the output impedance. The proposed OTA has a DC gain of 101 dB under no load condition. The designed reference voltage included in the LDO regulator is provided by a band gap reference with the temperature coefficient (T¿) of 0.025 mV/ºC. The proposed LDO regulator has a maximum drop-out voltage of 0.5 V @ 450 mA of load current, and has the worst case power supply rejection ratio (PSRR) of [54.5 dB, 34.3 dB] @ [100 Hz, 10 kHz] in full load condition. All the proposed circuits are designed using a 0.35 µm CMOS technology. The design is checked in order to corroborate its performance for wide range of input voltage, founding that the circuit design works fine meeting all the initial specification requirements.Postprint (published version

    Output-capacitorless low-dropout regulator for power management applications

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    This article aims to present the design of a 4.5-V, 450-mA low drop-out (LDO) voltage linear regulator based on a two-stage cascoded operational transconductance amplifier (OTA) as error amplifier. The aforementioned two-stage OTA is designed with cascoded current mirroring technique to boost up the output impedance. The proposed OTA has a DC gain of 101 dB under no load condition. The designed reference voltage included in the LDO regulator is provided by a band gap reference with the temperature coefficient (T¿) of 0.025 mV/ºC. The proposed LDO regulator has a maximum drop-out voltage of 0.5 V @ 450 mA of load current, and has the worst case power supply rejection ratio (PSRR) of [54.5 dB, 34.3 dB] @ [100 Hz, 10 kHz] in full load condition. All the proposed circuits are designed using a 0.35 µm CMOS technology. The design is checked in order to corroborate its performance for wide range of input voltage, founding that the circuit design works fine meeting all the initial specification requirements.Postprint (published version

    High Efficiency Power Amplifier Based on Envelope Elimination and Restoration Technique

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    Due to complex envelope and phase modulation employed in modern transmitters it is necessary to use power amplifiers that have high linearity. Linear power amplifiers (classes A, B and AB) are commonly used, but they suffer from low efficiency especially if the transmitted signal has high peak to average power ratio (PAPR). Kahn's technique based on envelope elimination and restoration (EER) is based on idea that high efficiency power supply (envelope amplifier) could be used to modulate the envelope of high efficient non linear power amplifiers (classes D or E). This paper presents solutions for power amplifier that performs envelope modulation and class E amplifier that is used as a non linear amplifier. The envelope amplifier is implemented as a multilevel converter in series with linear regulator and can provide up to 100 W of instantaneous power and reproduce 2 MHz sine wave. The implemented Class E amplifier can operate at 120 MHz with efficiency near to 85%. The envelope amplifier and class E amplifier have been integrated and efficiency and linearity of the implemented transmitter has been measured and presente

    FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation

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    A new internally compensated low drop-out voltage regulator based on the cascoded flipped voltage follower is presented in this paper. Adaptive biasing current and fast charging/discharging paths have been added to rapidly charge and discharge the parasitic capacitance of the pass transistor gate, thus improving the transient response. The proposed regulator was designed with standard 65-nm CMOS technology. Measurements show load and line regulations of 433.80 ÎĽV/mA and 5.61 mV/V, respectively. Furthermore, the output voltage spikes are kept under 76 mV for 0.1 mA to 100 mA load variations and 0.9 V to 1.2 V line variations with rise and fall times of 1 ÎĽs. The total current consumption is 17.88 ÎĽA (for a 0.9 V supply voltage).Ministerio de EconomĂ­a y Competitividad TEC2015-71072-C3-3-RConsejerĂ­a de EconomĂ­a, InnovaciĂłn y Ciencia. Junta de AndalucĂ­a P12-TIC-186

    Quasi-digital low-dropout voltage regulators uses controlled pass transistors

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    This article presents a low quiescent current output capacitorless quasi-digital CMOS LDO regulator with controlled pass transistors according to load demands. The pass transistor of the LDO is broken up to two smaller sizes based on a breakup criterion defined here, which considers the maximum output voltage variations to different load current steps to find the suitable current boundary for breaking up. This criterion shows that low load conditions will cause more output variations and settling time if the pass transistor is used in its maximum size. Therefore, using one smaller transistor for low load currents, and another one larger for higher currents, is the best trade-off between output variations, complexity, and power dissipation. The proposed LDO regulator has been designed and post-simulated in HSPICE in a 0.35 µm CMOS process to supply a load current between 0-100 mA while consumes 7.6 µA quiescent current. The results reveal 46% and 69% improvement on the output voltage variations and settling time, respectively.Postprint (published version

    Voltage to frequency converter Patent

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    Voltage controlled, variable frequency relaxation oscillator with MOSFET variable current fee

    The dc-to-dc converters employing staggered-phase power switches with two-loop control

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    A switched inductor voltage is coupled to a sense winding in each phase, and all sense windings are connected in series to one of two feedback loops to provide a signal that indicates when one of the power switches is on as the principal determinant of switching instants. A sequencer is triggered each time a pulse generator is triggered to turn on a different power switch in sequence at each switching instant

    Method and apparatus for battery charge control Patent

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    Battery charging system with cell to cell voltage balanc

    Noise Characterization and Filtering in the MicroBooNE Liquid Argon TPC

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    The low-noise operation of readout electronics in a liquid argon time projection chamber (LArTPC) is critical to properly extract the distribution of ionization charge deposited on the wire planes of the TPC, especially for the induction planes. This paper describes the characteristics and mitigation of the observed noise in the MicroBooNE detector. The MicroBooNE's single-phase LArTPC comprises two induction planes and one collection sense wire plane with a total of 8256 wires. Current induced on each TPC wire is amplified and shaped by custom low-power, low-noise ASICs immersed in the liquid argon. The digitization of the signal waveform occurs outside the cryostat. Using data from the first year of MicroBooNE operations, several excess noise sources in the TPC were identified and mitigated. The residual equivalent noise charge (ENC) after noise filtering varies with wire length and is found to be below 400 electrons for the longest wires (4.7 m). The response is consistent with the cold electronics design expectations and is found to be stable with time and uniform over the functioning channels. This noise level is significantly lower than previous experiments utilizing warm front-end electronics.Comment: 36 pages, 20 figure
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