4,854 research outputs found

    Smart Sensor Networks For Sensor-Neural Interface

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    One in every fifty Americans suffers from paralysis, and approximately 23% of paralysis cases are caused by spinal cord injury. To help the spinal cord injured gain functionality of their paralyzed or lost body parts, a sensor-neural-actuator system is commonly used. The system includes: 1) sensor nodes, 2) a central control unit, 3) the neural-computer interface and 4) actuators. This thesis focuses on a sensor-neural interface and presents the research related to circuits for the sensor-neural interface. In Chapter 2, three sensor designs are discussed, including a compressive sampling image sensor, an optical force sensor and a passive scattering force sensor. Chapter 3 discusses the design of the analog front-end circuit for the wireless sensor network system. A low-noise low-power analog front-end circuit in 0.5μm CMOS technology, a 12-bit 1MS/s successive approximation register (SAR) analog-to-digital converter (ADC) in 0.18μm CMOS process and a 6-bit asynchronous level-crossing ADC realized in 0.18μm CMOS process are presented. Chapter 4 shows the design of a low-power impulse-radio ultra-wide-band (IR-UWB) transceiver (TRx) that operates at a data rate of up to 10Mbps, with a power consumption of 4.9pJ/bit transmitted for the transmitter and 1.12nJ/bit received for the receiver. In Chapter 5, a wireless fully event-driven electrogoniometer is presented. The electrogoniometer is implemented using a pair of ultra-wide band (UWB) wireless smart sensor nodes interfacing with low power 3-axis accelerometers. The two smart sensor nodes are configured into a master node and a slave node, respectively. An experimental scenario data analysis shows higher than 90% reduction of the total data throughput using the proposed fully event-driven electrogoniometer to measure joint angle movements when compared with a synchronous Nyquist-rate sampling system. The main contribution of this thesis includes: 1) the sensor designs that emphasize power efficiency and data throughput efficiency; 2) the fully event-driven wireless sensor network system design that minimizes data throughput and optimizes power consumption

    Network-aware design-space exploration of a power-efficient embedded application

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    The paper presents the design and multi-parameter optimization of a networked embedded application for the health-care domain. Several hardware, software, and application parameters, such as clock frequency, sensor sampling rate, data packet rate, are tuned at design- and run-time according to application specifications and operating conditions to optimize hardware requirements, packet loss, power consumption. Experimental results show that further power efficiency can be achieved by considering also communication aspects during design space exploratio

    An Asynchronous Multi-Sensor Micro Control Unit for Wireless Body Sensor Networks (WBSNs)

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    In this work, an asynchronous multi-sensor micro control unit (MCU) core is proposed for wireless body sensor networks (WBSNs). It consists of asynchronous interfaces, a power management unit, a multi-sensor controller, a data encoder (DE), and an error correct coder (ECC). To improve the system performance and expansion abilities, the asynchronous interface is created for handshaking different clock domains between ADC and RF with MCU. To increase the use time of the WBSN system, a power management technique is developed for reducing power consumption. In addition, the multi-sensor controller is designed for detecting various biomedical signals. To prevent loss error from wireless transmission, use of an error correct coding technique is important in biomedical applications. The data encoder is added for lossless compression of various biomedical signals with a compression ratio of almost three. This design is successfully tested on a FPGA board. The VLSI architecture of this work contains 2.68-K gate counts and consumes power 496-μW at 133-MHz processing rate by using TSMC 0.13-μm CMOS process. Compared with the previous techniques, this work offers higher performance, more functions, and lower hardware cost than other micro controller designs

    A Multifunctional Integrated Circuit Router for Body Area Network Wearable Systems

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    A multifunctional router IC to be included in the nodes of a wearable body sensor network is described and evaluated. The router targets different application scenarios, especially those including tens of sensors, embedded into textile materials and with high data-rate communication demands. The router IC supports two different functionality sets, one for sensor nodes and another for the base node, both based on the same circuit module. The nodes are connected to each other by means of woven thick conductive yarns forming a mesh topology with the base node at the center. From the standpoint of the network, each sensor node is a four port router capable of handling packets from destination nodes to the base node, with sufficient redundant paths. The adopted hybrid circuit and packet switching scheme significantly improve network performance in terms of end-to-end delay, throughput and power consumption. The IC also implements a highly precise, sub-microsecond one-way time synchronization protocol which is used for time stamping the acquired data. The communication module was implemented in a 4-metal, 0.35 μm CMOS technology. The maximum data rate of the system is 35 Mbps while supporting up to 250 sensors, which exceeds current BAN applications scenarios.This work was supported in part by the Fundação para a Ciéncia e a Tecnologia (FCT) (Portuguese Foundation for Science and Technology) under Project PROLIMB PTDC/EEAELC/103683/2008 and through the Ph.D. Grant SFRH/BD/75324/2010, and in part by the CREaTION, FCT/MEC through national funds and co-funded by the FEDER-PT2020 partnership agreement under Project UIDB/EEA/50008/2020, Project CONQUEST (CMU/ECE/030/2017), Project COST CA15104, and ORCIP. (Corresponding author: Fardin Derogarian Miyandoab.)info:eu-repo/semantics/publishedVersio

    Low Power Circuits for Smart Flexible ECG Sensors

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    Cardiovascular diseases (CVDs) are the world leading cause of death. In-home heart condition monitoring effectively reduced the CVD patient hospitalization rate. Flexible electrocardiogram (ECG) sensor provides an affordable, convenient and comfortable in-home monitoring solution. The three critical building blocks of the ECG sensor i.e., analog frontend (AFE), QRS detector, and cardiac arrhythmia classifier (CAC), are studied in this research. A fully differential difference amplifier (FDDA) based AFE that employs DC-coupled input stage increases the input impedance and improves CMRR. A parasitic capacitor reuse technique is proposed to improve the noise/area efficiency and CMRR. An on-body DC bias scheme is introduced to deal with the input DC offset. Implemented in 0.35m CMOS process with an area of 0.405mm2, the proposed AFE consumes 0.9W at 1.8V and shows excellent noise effective factor of 2.55, and CMRR of 76dB. Experiment shows the proposed AFE not only picks up clean ECG signal with electrodes placed as close as 2cm under both resting and walking conditions, but also obtains the distinct -wave after eye blink from EEG recording. A personalized QRS detection algorithm is proposed to achieve an average positive prediction rate of 99.39% and sensitivity rate of 99.21%. The user-specific template avoids the complicate models and parameters used in existing algorithms while covers most situations for practical applications. The detection is based on the comparison of the correlation coefficient of the user-specific template with the ECG segment under detection. The proposed one-target clustering reduced the required loops. A continuous-in-time discrete-in-amplitude (CTDA) artificial neural network (ANN) based CAC is proposed for the smart ECG sensor. The proposed CAC achieves over 98% classification accuracy for 4 types of beats defined by AAMI (Association for the Advancement of Medical Instrumentation). The CTDA scheme significantly reduces the input sample numbers and simplifies the sample representation to one bit. Thus, the number of arithmetic operations and the ANN structure are greatly simplified. The proposed CAC is verified by FPGA and implemented in 0.18m CMOS process. Simulation results show it can operate at clock frequencies from 10KHz to 50MHz. Average power for the patient with 75bpm heart rate is 13.34W

    Low-Power Wireless Wearable ECG Monitoring Chestbelt Based on Ferroelectric Microprocessor

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    Since cadiovascular disease (CVD) posts a heavy threat to people's health, long-term electrocardiogram (ECG) monitoring is of great value for the improvement of treatment. To realize remote long-term ECG monitoring, a low-power wireless wearable ECG monitoring device is proposed in this paper. The ECG monitoring device, abbreviated as ECGM, is designed based on ferroelectric microprocessor which provides ultra-low power consumption and contains four parts-MCU, BLE, Sensors and Power. The MCU part means circuit of MSP430FR2433, the core of ECGM. The BLE part is the CC2640R2F module applied for wireless transmission of the collected bio-signal data. And the sensors part includes several sensors like BMD101 used for monitoring bio-signals and motion of the wearer, while the Power part consists of battery circuit, charging circuit and 3.3V/1.8V/4.4V power supply circuit. The ECGM first collects ECG signals from the fabric electrodes adhered to wearers' chest, preprocesses the signals to eliminate the injected noise, and then transmit the output data to wearers' hand-held mobile phones through Bluetooth low energy (BLE). The wearers are enabled to acquire ECGs and other physiological parameters on their phones as well as some corresponding suggestions. The novelty of the system lies in the combination of low-power ECG sensor chip with ferroelectric microprocessor, thus achieving ultra-low power consumption and high signal quality

    Bioelectronic Sensor Nodes for Internet of Bodies

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    Energy-efficient sensing with Physically-secure communication for bio-sensors on, around and within the Human Body is a major area of research today for development of low-cost healthcare, enabling continuous monitoring and/or secure, perpetual operation. These devices, when used as a network of nodes form the Internet of Bodies (IoB), which poses certain challenges including stringent resource constraints (power/area/computation/memory), simultaneous sensing and communication, and security vulnerabilities as evidenced by the DHS and FDA advisories. One other major challenge is to find an efficient on-body energy harvesting method to support the sensing, communication, and security sub-modules. Due to the limitations in the harvested amount of energy, we require reduction of energy consumed per unit information, making the use of in-sensor analytics/processing imperative. In this paper, we review the challenges and opportunities in low-power sensing, processing and communication, with possible powering modalities for future bio-sensor nodes. Specifically, we analyze, compare and contrast (a) different sensing mechanisms such as voltage/current domain vs time-domain, (b) low-power, secure communication modalities including wireless techniques and human-body communication, and (c) different powering techniques for both wearable devices and implants.Comment: 30 pages, 5 Figures. This is a pre-print version of the article which has been accepted for Publication in Volume 25 of the Annual Review of Biomedical Engineering (2023). Only Personal Use is Permitte
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