Ultra-High Capacity Silicon Photonic Interconnects through Spatial Multiplexing

The market for higher data rate communication is driving the semiconductor industry to develop new techniques of writing at smaller scales, while continuing to scale bandwidth at low power consumption. The question arises of how to continue to sustain this trend. Silicon photonic (SiPh) devices offer a potential solution to the electronic interconnect bandwidth bottleneck. SiPh leverages the technology commensurate of decades of fabrication development with the unique functionality of next-generation optical interconnects. Finer fabrication techniques have allowed for manufacturing physical characteristics of waveguide structures that can support multiple modes in a single waveguide. By refining modal characteristics in photonic waveguide structures, through mode multiplexing with the asymmetric y-junction and microring resonator, higher aggregate data bandwidth is demonstrated via various combinations of spatial multiplexing, broadening applications supported by the integrated platform. The main contributions of this dissertation are summarized as follows. Experimental demonstrations of new forms of spatial multiplexing combined together exhibit feasibility of data transmission through mode-division multiplexing (MDM), mode-division and wavelength-division multiplexing (MDM-WDM), and mode-division and polarization-division multiplexing (MDM-PDM) through a C-band, Si photonic platform. Error-free operation through mode multiplexers and demultiplexers show how data can be viably scaled on multiple modes and with existing spatial domains simultaneously. This work opens up new avenues for scaling bandwidth capacity through leveraging orthogonal domains available on-chip, beyond what had previously been employed like WDM and time-division multiplexing (TDM). Furthermore, we explore expanding device channel support from two to three arms. Finding that a slight mismatch in the third arm can increase crosstalk contributions considerably, especially when increasing data rate, we explore a methodical way to design the asymmetric y-junction device by considering its angles and multiplexer/demultiplexer arm width. By taking into consideration device fabrication variations, we turn towards optimizing device performance post-fabrication. Through ModePROP simulations, optimizing device performance dynamically post-fabrication is analyzed, through either electro-optical or thermo-optical means. By biasing the arm introducing the slight spectral offset, we can quantifiably improve device performance. Scaling bandwidth is experimentally demonstrated through the device at 3 modes, 2 wavelengths, and 40 Gb/s data rate for 240 Gb/s aggregate bandwidth, with the potential to reduce power penalty per the device optimization process we described. A main motivation for this on-chip spatial multiplexing is the need to reduce costs. As the laser source serves as the greatest power consumer in an optical system, mode-division multiplexing and other forms of spatial multiplexing can be implemented to push its potentially prohibitive cost metrics down. While the device introduces loss, through imperfect mode isolation, as device fabrication improves, tolerance can increase as well. Meanwhile, the rate that laser power consumption increases as supported wavelengths scales is shown to be much faster than the loss introduced by scaling on-chip bandwidth multi-modally. Future generations of ultra-high capacity devices through spatial multiplexing is explored. Already various systems can be implemented multimodally, with the design features serving as useful for other components. Central to photonic network-on-chips, a multimodal switch fabric, composed of microring resonators, is demonstrated to have error-free operation of 1x2 switching of 10 Gb/s data. These contributions aim to scale bandwidth to ultra-high capacity, while ameliorating any imperfect design, through multiple routes conjoined with on-chip spatial multiplexing, and they constitute the bulk of this dissertation. For the latter part, we turn to the issue of integrating a photonic device for dynamic power reallocation in a system. Specifically, we utilize a 4x4 nonblocking switch fabric composed of Mach-Zehnder interferometers that switch both electro-optically and thermo-optically at ns and μs rates respectively. In order to demonstrate an intelligent platform capable of dynamically multicasting data and reallocating power as needed by the system, we must first initialize the switch fabric to control with an electronic interface. A dithering mechanism, whereby exact cross, bar, and sub-percentage states are enforced through the device, is described here. Such a method could be employed for actuating the device table of bias values to states automatically. We then employ a dynamic power reallocation algorithm through a data acquisition unit, showing real-time channel recovery for channels experiencing power loss by diverting power from paths that could tolerate it. The data that is being multicast through the system is experimentally shown to be error-free at 40 Gb/s data rate, when transmitting from one to three clients and going from automatic bar/cross states to equalized power distribution. For the last portion of this topic, the switch fabric was inserted into a high-performance computing system. In order to run benchmarks at 10 Gb/s data ontop of the switch fabric, a newer model of the control plane was implemented to toggle states according to the command issued by the server. Such a programmable mechanism will prove necessary in future implementations of optical subsystems embedded inside larger systems, like data centers. Beyond the specific control plane demonstrated, the idea of an intelligent photonic layer can be applied to alleviate many kinds of optical channel abnormalities or accommodate for switching based on different patterns in data transmission. Besides spatial-multiplexing, expanding on-chip bandwidth can be accomplished by extension of the wavelength detection regime to a longer regime. Experimental demonstration of photodetection at 1.9 μm is shown with Si+-doped Si photodetectors at 1 Gb/s data operation featuring responsivities of .03 AW−1 at 5 V bias. The same way of processing these Si ribbed waveguide photodetectors can garner even longer wavelength operation at 2.2 μm wavelength. Finally, the experimental demonstration of a coherent perfect absorption Si modulator is exhibited, showing a viable extinction ratio of 24.5 dB. Using this coherent perfect absorption mechanism to demodulate signals, there is the added benefit of differential reception. Currently, an automated process for data collection is employed at a faster time scale than instabilities present in fibers in the setup with future implementations eliminating the off-chip phase modulator for greater signal stability. The field of SiPh has developed to a stage where specific application domains can take off and compete according to industrial-level standards. The work in this dissertation contributes to experimental demonstration of a newly developing area of mode-division multiplexing for substantially increasing bandwidth on-chip. While implementing the discussed photonic devices in dynamic systems, various attributes of integrated photonics are leveraged with existing electronic technologies. Future generations of computing systems should then be designed by implementing both system and device level considerations

Two-mode squeezing over deployed fiber coexisting with conventional communications

Squeezed light is a crucial resource for continuous-variable (CV) quantum information science. Distributed multi-mode squeezing is critical for enabling CV quantum networks and distributed quantum sensing. To date, multi-mode squeezing measured by homodyne detection has been limited to single-room experiments without coexisting classical signals, i.e., on ``dark'' fiber. Here, after distribution through separate fiber spools (5~km), $-0.9\pm0.1$-dB coexistent two-mode squeezing is measured. Moreover, after distribution through separate deployed campus fibers (about 250~m and 1.2~km), $-0.5\pm0.1$-dB coexistent two-mode squeezing is measured. Prior to distribution, the squeezed modes are each frequency multiplexed with several classical signals -- including the local oscillator and conventional network signals -- demonstrating that the squeezed modes do not need dedicated dark fiber. After distribution, joint two-mode squeezing is measured and recorded for post-processing using triggered homodyne detection in separate locations. This demonstration enables future applications in quantum networks and quantum sensing that rely on distributed multi-mode squeezing.Comment: 23 pages, 13 figures, 2 table

Next Generation Silicon Photonic Transceiver: From Device Innovation to System Analysis

Silicon photonics is recognized as a disruptive technology that has the potential to reshape many application areas, for example, data center communication, telecommunications, high-performance computing, and sensing. The key capability that silicon photonics offers is to leverage CMOS-style design, fabrication, and test infrastructure to build compact, energy-efficient, and high-performance integrated photonic systems-on- chip at low cost. As the need to squeeze more data into a given bandwidth and a given footprint increases, silicon photonics becomes more and more promising. This work develops and demonstrates novel devices, methodologies, and architectures to resolve the challenges facing the next-generation silicon photonic transceivers. The first part of this thesis focuses on the topology optimization of passive silicon photonic devices. Specifically, a novel device optimization methodology - particle swarm optimization in conjunction with 3D finite-difference time-domain (FDTD), has been proposed and proven to be an effective way to design a wide range of passive silicon photonic devices. We demonstrate a polarization rotator and a 90◦ optical hybrid for polarization-diversity and phase-diversity communications - two important schemes to increase the communication capacity by increasing the spectral efficiency. The second part of this thesis focuses on the design and characterization of the next- generation silicon photonic transceivers. We demonstrate a polarization-insensitive WDM receiver with an aggregate data rate of 160 Gb/s. This receiver adopts a novel architecture which effectively reduces the polarization-dependent loss. In addition, we demonstrate a III-V/silicon hybrid external cavity laser with a tuning range larger than 60 nm in the C-band on a silicon-on-insulator platform. A III-V semiconductor gain chip is hybridized into the silicon chip by edge-coupling to the silicon chip. The demonstrated packaging method requires only passive alignment and is thus suitable for high-volume production. We also demonstrate all silicon-photonics-based transmission of 34 Gbaud (272 Gb/s) dual-polarization 16-QAM using our integrated laser and silicon photonic coherent transceiver. The results show no additional penalty compared to commercially available narrow linewidth tunable lasers. The last part of this thesis focuses on the chip-scale optical interconnect and presents two different types of reconfigurable memory interconnects for multi-core many-memory computing systems. These reconfigurable interconnects can effectively alleviate the memory access issues, such as non-uniform memory access, and Network-on-Chip (NoC) hot-spots that plague the many-memory computing systems by dynamically directing the available memory bandwidth to the required memory interface

Integrated optics technology study

The status and near term potential of materials and processes available for the fabrication of single mode integrated electro-optical components are discussed. Issues discussed are host material and orientation, waveguide formation, optical loss mechanisms, wavelength selection, polarization effects and control, laser to integrated optics coupling fiber optic waveguides to integrated optics coupling, sources, and detectors. Recommendations of the best materials, technology, and processes for fabrication of integrated optical components for communications and fiber gyro applications are given

Heterogeneous Integrated Photonic Transceiver on Silicon

The demand for high-speed and low-cost short-distance data links, eventually for chip-level optical communication, has led to large efforts to develop high density photonics integrated circuits (PICs) to decrease the power consumption and unit price. Particularly, silicon based photonic integration promise future high-speed and cost-effective optical interconnects to enable exascale performance computers and datacenters. High-level integration of all photonics components on chip, including high speed modulators and photodetectors, and especially lasers, is required for scalable and energy efficient system topology designs. This is enabled by silicon-based heterogeneous integration approach, which transfers different material systems to the silicon substrate with a complementary metal–oxide–semiconductor (CMOS) compatible process. In this thesis, our work focuses on the development of silicon photonic integrated circuit in the applications of high speed chip level optical interconnects. A full library of functional devices is demonstrated on silicon, including low threshold distributed feedback (DFB) lasers as a low power laser source; high extinction ratio and high speed electroabsorption modulators (EAM) and ultra-linear Mach-Zehnder interferometer (MZI) modulators for signal modulation in the data transmitter; high speed photodetectors for the data receiver; and low loss silicon components, such as arrayed waveguide grating (AWG) routers and broadband MZI based switches. The design and characterization of those devices are discussed in this thesis. A highly integrated photonic circuit can be achieved with co-design and co-process of all types of functional photonic devices. Selective die bonding method is performed to integrate multiple III-V dies with different band-gap onto a single photonic die. A reconfigurable network-on-chip circuit was proposed and demonstrated, with state-of-the-art high-speed silicon transceiver chip. With over 400 active and passive components heterogeneously integrated on silicon, photonic circuit with multiple- wavelength-division multiplexing (WDM) transceiver nodes achieved a total capacity up to 8×8×40 Gbps. This high capacity and dense integrated heterogenous circuit shows its potential as a solution for future ultra-high speed inter- and intra-chip interconnects