Void Formation Study of Flip Chip in Package Using No-Flow Underfill

©2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or distribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.DOI: 10.1109/TEPM.2008.2002951The advanced flip chip in package (FCIP) process using no-flow underfill material for high I/O density and fine-pitch interconnect applications presents challenges for an assembly process that must achieve high electrical interconnect yield and high reliability performance. With respect to high reliability, the voids formed in the underfill between solder bumps or inside the solder bumps during the no-flow underfill assembly process of FCIP devices have been typically considered one of the critical concerns affecting assembly yield and reliability performance. In this paper, the plausible causes of underfill void formation in FCIP using no-flow underfill were investigated through systematic experimentation with different types of test vehicles. For instance, the effects of process conditions, material properties, and chemical reaction between the solder bumps and no-flow underfill materials on the void formation behaviors were investigated in advanced FCIP assemblies. In this investigation, the chemical reaction between solder and underfill during the solder wetting and underfill cure process has been found to be one of the most significant factors for void formation in high I/O and fine-pitch FCIP assembly using no-flow underfill materials

Study of intermetallic compound layer formation, growth and evaluation of shear strength of lead-free solder joints

Solder joints play a very important role in electronic products as the integrity of electronics packaging and assembly rests on the quality of these connections. The increasing demands for higher performance, lower cost, and miniaturisation in hand-held and consumer electronic products have led to the use of dense interconnections. This miniaturization trend means that solder joint reliability remains an important challenge with surface mount electronics assembly, especially those used in hostile environments, and applications such as automobile, aerospace and other safety critical operations. One of the most important factors which are known to affect solder joint reliability is the thickness of intermetallic compound (IMC) layer formed between the solder and the substrate. Although the formation of an IMC layer signifies good bonding between the solder and substrate, its main disadvantage is that it is also known to be the most brittle part of the solder joint. Thus as the miniaturisation trend continues, and solder joints become even smaller in size, the nature and impact of IMC layer thickness on solder joint reliability becomes even more of a concern with the introduction of new lead-free soldering. Other factors which are known to affect solder joint reliability include the bonding strength, the voiding percentage in joints, the size of the voids and their location within the joint. The work reported in this thesis on formation and growth of intermetallic compound layer, and evaluation of the shear strength of lead-free solder joints is divided into four main parts. The first part of the study is concerned with understanding of the effect of pad sizes on Inter-metallic compound layer formation and growth for lead-free solder joints. The second part concerns the study of the effect of temperature cycling and reflow profiles on intermetallic growth between Sn-Ag-Cu alloy and Cu substrate. The third part of the study concerns the investigation of the effect of reflow soldering profile optimization on solder volumes using design of experiment technique. The focus of the final part of the study is the investigation of the effect of Inter-metallic Compound thickness on shear strength of 1206 surface mount chip resistor. The results from the experimental work showed that the pad size has very little influence on the growth of the IMC. The result also shows that the growth of IMC depends on diffusion rate, temperature and time according to the power-law model; and that the IMC layer thickness is independent of pad size. The significance of this result is that with further reductions in joint size (with IMC layer thickness remaining the same), the ratio of the IMC layer thickness to solder joint size will increase and adversely impact the joint reliability. The work carried out on ageing temperatures and reflow profiles of Sn-Ag-Cu alloy and Cu substrate also showed the reaction-diffusion mechanism of intermetallic compound formation and growth in solder joints. The study also showed that the most significant factor in achieving lower IMC layer thickness and fine microstructures is the time to peak temperature of the reflow soldering process. The effect of IMC layer thickness on the shear strength of Sn-Ag-Cu solder joints was investigated. The relationship of shear strength, interfacial microstructures and fracture surfaces was considered. It is clear that formation of continuous Cu-Sn and SnNiCu layers are the reason for the weak interface strength. The results show that the shear strength of solder joints decreases with increasing ageing time. The results of this study have been disseminated through journal and conference publications and will be of interest to R&D personnel working in the area of high temperature electronics and in particular those working in the field of automotive electronics

MICROSTRUCTURAL CHARACTERIZATION AND THERMAL CYCLING RELIABILITY OF SOLDERS UNDER ISOTHERMAL AGING AND ELECTRICAL CURRENT

Solder joints on printed circuit boards provide electrical and mechanical connections between electronic devices and metallized patterns on boards. These solder joints are often the cause of failure in electronic packages. Solders age under storage and operational life conditions, which can include temperature, mechanical loads, and electrical current. Aging occurring at a constant temperature is called isothermal aging. Isothermal aging leads to coarsening of the bulk microstructure and increased interfacial intermetallic compounds at the solder-pad interface. The coarsening of the solder bulk degrades the creep properties of solders, whereas the voiding and brittleness of interfacial intermetallic compounds leads to mechanical weakness of the solder joint. Industry guidelines on solder interconnect reliability test methods recommend preconditioning the solder assemblies by isothermal aging before conducting reliability tests. The guidelines assume that isothermal aging simulates a "reasonable use period," but do not relate the isothermal aging levels with specific use conditions. Studies on the effect of isothermal aging on the thermal cycling reliability of tin-lead and tin-silver-copper solders are limited in scope, and results have been contradictory. The effect of electrical current on solder joints has been has mostly focused on current densities above 104A/cm2 with high ambient temperature (≥100oC), where electromigration, thermomigration, and Joule heating are the dominant failure mechanisms. The effect of current density below 104A/cm2 on temperature cycling fatigue of solders has not been established. This research provides the relation between isothermal aging and the thermal cycling reliability of select Sn-based solders. The Sn-based solders with 3%, 1%, and 0% silver content that have replaced tin-lead are studied and compared against tin-lead solder. The activation energy and growth exponents of the Arrhenius model for the intermetallic growth in the solders are provided. An aging metric to quantify the aging of solder joints, in terms of phase size in the solder bulk and interfacial intermetallic compound thickness at the solder-pad interface, is established. Based on the findings of thermal cycling tests on aged solder assemblies, recommendations are made for isothermal aging of solders before thermal cycling tests. Additionally, the effect of active electrical current at 103 A/cm2 on thermal cycling reliability is reported

NANO-PARTICLE REINFORCED SOLDERS FOR MICROELECTRONIC INTERCONNECT APPLICATIONS

Ph.DDOCTOR OF PHILOSOPH

Numerical analysis of lead-free solder joints: effects of thermal cycling and electromigration

To meet the requirements of miniaturization and multifunction in microelectronics, understanding of their reliability and performance has become an important research subject in order to characterise electronics served under various loadings. Along with the demands of the increasing miniaturization of electronic devices, various properties and the relevant thermo-mechanical-electrical response of the lead-free solder joints to thermal cycling and electro-migration become the critical factors, which affect the service life of microelectronics in different applications. However, due to the size and structure of solder interconnects in microelectronics, traditional methods based on experiments are not applicable in the evaluation of their reliability under complex joint loadings. This thesis presents an investigation, which is based on finite-element method, into the performance of lead-free solder interconnects under thermal fatigue and electro-migration, specifically in the areas as follows: (1) the investigation of thermal-mechanical performance and fatigue-life prediction of flip-chip package under different sizes to achieve a further understanding of IMC layer and size effects of a flip chip package under thermal cycling; (2) the establishment of a numerical method, simulating void-formation/crack-propagation based on the results of finite-element analysis, to allow the prediction of crack evolution and failure time for electro-migration reliability of solder bumps; (3) the establishment of a flow-based algorithm for combination effects of thermal-mechanical and electro-migration that was subsequent implemented in to an FE model to evaluate the reliability assessment of service lives associated with a flip chip package

Microstructural and mechanical characteristics of micro-scale intermetallic compounds interconnections

Following the continually increasing demand for high-density interconnection and multilayer packaging for chips, solder bump size has decreased significantly over the years, this has led to some challenges in the reliability of interconnects. This thesis presents research into the resulting effects of miniaturization on the interconnection with Sn-solder, especially focusing on the full intermetallics (IMCs) micro-joints which appear in the 3D IC stacking packaging. Thereby, systematic studies have been conducted to study the microstructural evolution and reliability issues of Cu-Sn and Cu-Sn-Ni IMCs micro-joints. (1) Phenomenon of IMCs planar growth: The planar IMCs interlayer was asymmetric and composed of (Cu,Ni)6Sn5 mainly in Ni/Sn (2.5~5 µm)/Cu interconnect. Meanwhile, it was symmetric two-layer structure in Cu/Sn (2.5~5 µm)/Cu interconnect with the Cu3Sn fine grains underneath Cu6Sn5 cobblestone-shape-like grains for each IMCs layer. Besides, it is worth noticing that the appearance of Cu-rich whiskers (the mixture of Cu/Cu2O/SnOx/Cu6Sn5) could potentially lead to short-circuit in the cases of ultra-fine (<10 µm pitch) interconnects for the miniaturization of electronics devices. (2) Microstructural evolution process of Cu-Sn IMCs micro-joint: The simultaneous solidification of IMCs interlayer supressed the scalloped growth of Cu6Sn5 grains in Cu/Sn (2.5 µm)/Cu interconnect during the transient liquid phase (TLP) soldering process. The growth factor of Cu3Sn was in the range of 0.29~0.48 in Cu-Cu6Sn5 diffusion couple at 240~290 °C, which was impacted significantly by the type of substrates. And the subsequent homogenization process of Cu3Sn grains was found to be consistent with the description of flux-driven ripening (FDR) theory. Moreover, Kirkendall voids appeared only in the Cu3Sn layer adjacent to Cu-plated substrate, and this porous Cu3Sn micro-joint was mechanically robust during the shear test. (3) Microstructural evolution of Cu-Sn-Ni IMCs micro-joint: There was obvious inter-reaction between the interfacial reactions in Ni/Sn (1.5 µm)/Cu interconnect. The growth factor of (Cu,Ni)3Sn on Cu side was about 0.36 at 240 °C, and the reaction product on Ni side was changed from Ni3Sn4 into (Cu,Ni)6Sn5 with the increase of soldering temperature. In particular, the segregation of Ni atoms occurred along with phase transformation at 290 °C and thereby stabilized the (Cu,Ni)6Sn5 phase for the high Ni content of 20 at.%. (4) Micro-mechanical characteristics of Cu-Sn-Ni IMCs micro-joint: The Young s modulus and hardness of Cu-Sn-Ni IMCs were measured by nanoindentation test, such as 160.6±3.1 GPa/ 7.34±0.14 GPa for (Cu,Ni)6Sn5 and 183.7±4.0 GPa/ 7.38±0.46 GPa for (Cu,Ni)3Sn, respectively. Besides, in-situ nano-compression tests have been conducted on IMCs micro-cantilevers, the fracture strength turns out to be 2.46 GPa. And also, the ultimate tensile stress was calculated to be 2.3±0.7 GPa from in-situ micro-bending tests, which is not sensitive with the microstructural change of IMCs after dwelling at 290 °C

An investigation into nano-particulates reinforced SAC305-based composite solders under electro- and thermo-migration conditions

With the rapid development in electronic packaging due to product miniaturisation, the size of solder joints is decreasing considerably, thus the failure of solder interconnects induced by electro-migration (EM) and thermo-migration (TM) became a reliability concern. The incorporation of foreign reinforcement can effectively improve properties of the solder alloys. However, this presents an imperative need for a further investigation to elaborate the underlying fundamentals associated with the reliability of reinforced solders. In this study, the Sn-Ag-Cu (SAC) based solder alloy powders as matrix were incorporated with Fullerene (FNS), TiC and Ni-coated graphene (NG) reinforcements to form composite solders through powder metallurgical method. These composite solders were then characterised in terms of their microstructure, physical property, solderability, followed by a systematic investigation of their performance under isothermal ageing, current stressing and large thermal gradient, respectively. The results showed that three types of reinforcements were successfully incorporated into the solder matrix; with all reinforcements added being embedded in the solder matrix or around the intermetallic compounds (IMC). The average loss of FNS and TiC particles in the solders was approximately 80% after the initial reflow, while this was only 40% for NG particles. It has been observed that β-Sn and Ag3Sn in the SAC solder alloys can be refined by adding appropriate amount of FNS and TiC, which is beneficial to the wettability with a reduced coefficient of thermal expansion (CTE) with the minimal influence on the melting point and electrical resistivity of solder alloys. For the SAC alloys without reinforcements, obvious extrusion of interfacial IMC at the anode was present after 360 hours of current (1.5×104 A/cm2) stressing, while the changes of surface profiles of all reinforced solders were unnoticeable. Under the current stressing regimes, a continuous increase of interfacial IMCs at the anode of the original SAC alloys was observed, but decreased at the cathode with stressing time. For the composite solders, both anode and cathode showed a continuous growth of interfacial IMCs; the growth rates of IMCs at the anode were greater than that at cathode. In addition, NG and TiC were found to be most effective to retard the growth of Cu3Sn IMC under current stressing. A gradient in hardness across the stressed SAC joints was present, where it was harder at anode. However, no such obvious gradient was found in SAC/FNS and SAC/NG solder joints. FNS and NG were proven to be beneficial to prolong the service life of solder joints up to approximately 7.6% and 10.4% improvements, respectively. Thermal stressing made the interfacial IMC in the original SAC joints to grow at the cold end considerably; causing serious damage at the hot end after 600 hours under temperature gradient of 1240K/cm stressing; a large number of IMCs, cracks and voids appeared in the SAC solder joints. However, a uniform increase of IMCs at both sides in the composite solders was observed without apparent damages at the interfaces under the same thermal stressing conditions, indicating an effective reduction of the elemental migration in the reinforced solders. Although there were also some voids and IMCs formed in the composite solder joints after a long-term thermal stressing, the integrity of the composite solder joints was enhanced compared with the SAC alloys. During thermal stressing, the dissolution rate of Cu atom into the SAC solder joints was estimated to be 3.1×10-6 g/h, while the values for SAC/FNS, SAC/NG and SAC/TiC were only 1.22×10-6 g/h, 1.09×10-6 g/h and 1.67×10-6 g/h, respectively

The durability of solder joints under thermo-mechanical loading; application to Sn-37Pb and Sn-3.8Ag-0.7Cu lead-free replacement alloy

Solder joints in electronic packages provide mechanical, electrical and thermal connections. Hence, their reliability is also a major concern to the electronic packaging industry. Ball Grid Arrays (BGAs) are a very common type of surface mount technology for electronic packaging. This work primarily addresses the thermo-mechanical durability of BGAs and is applied to the exemplar alloys; traditional leaded solder and a popular lead-free solder. Isothermal mechanical fatigue tests were carried out on 4-ball test specimens of the lead-free (Sn-3.8Ag-0.7Cu) and leaded (Sn-37Pb) solder under load control at room temperature, 35°C and 75°C. As well as this, a set of combined thermal and mechanical cycling tests were carried out, again under load control with the thermal cycles either at a different frequency from the mechanical cycles (not-in-phase) or at the same frequency (both in phase and out-of-phase). The microstructural evaluation of both alloys was investigated by carrying out a series of simulated ageing tests, coupled with detailed metallurgical analysis and hardness testing. The results were treated to produce stress-life, cyclic behaviour and creep curves for each of the test conditions. Careful calibration allowed the effects of substrate and grips to be accounted for and so a set of strain-life curves to be produced. These results were compared with other results from the literature taking into account the observations on microstructure made in the ageing tests. It is generally concluded that the TMF performance is better for the Sn-Ag-Cu alloy than for the Sn-Pb alloy, when expressed as stress-life curves. There is also a significant effect on temperature and phase for each of the alloys, the Sn-Ag-Cu being less susceptible to these effects. When expressed as strain life, the effects of temperature, phase and alloy type are much diminished. Many of these conclusions coincided with only parts of the literature and reasons for the remaining differences are advanced

Computer-Aided Structural Analysis of the Lift Car – Frame System Under Emergency Arrest Operational Conditions

The paper presents Computer-Aided Analysis (CAA) model of a lift car - frame system. Structural analysis is carried out by the application of the Finite Element Method (FEM) to predict the responses and stresses arising in the system arising under the emergency conditions. The emergency scenario presented in the paper involves a buffer strike event which occurs during the car overtravel. The model can then be used to optimise the design to ensure safe operation of the syste