The Design of a System Architecture for Mobile Multimedia Computers

This chapter discusses the system architecture of a portable computer, called Mobile Digital Companion, which provides support for handling multimedia applications energy efficiently. Because battery life is limited and battery weight is an important factor for the size and the weight of the Mobile Digital Companion, energy management plays a crucial role in the architecture. As the Companion must remain usable in a variety of environments, it has to be flexible and adaptable to various operating conditions. The Mobile Digital Companion has an unconventional architecture that saves energy by using system decomposition at different levels of the architecture and exploits locality of reference with dedicated, optimised modules. The approach is based on dedicated functionality and the extensive use of energy reduction techniques at all levels of system design. The system has an architecture with a general-purpose processor accompanied by a set of heterogeneous autonomous programmable modules, each providing an energy efficient implementation of dedicated tasks. A reconfigurable internal communication network switch exploits locality of reference and eliminates wasteful data copies

Power Reductions with Energy Recovery Using Resonant Topologies

The problem of power densities in system-on-chips (SoCs) and processors has become more exacerbated recently, resulting in high cooling costs and reliability issues. One of the largest components of power consumption is the low skew clock distribution network (CDN), driving large load capacitance. This can consume as much as 70% of the total dynamic power that is lost as heat, needing elaborate sensing and cooling mechanisms. To mitigate this, resonant clocking has been utilized in several applications over the past decade. An improved energy recovering reconfigurable generalized series resonance (GSR) solution with all the critical support circuitry is developed in this work. This LC resonant clock driver is shown to save about 50% driver power (\u3e40% overall), on a 22nm process node and has 50% less skew than a non-resonant driver at 2GHz. It can operate down to 0.2GHz to support other energy savings techniques like dynamic voltage and frequency scaling (DVFS). As an example, GSR can be configured for the simpler pulse series resonance (PSR) operation to enable further power saving for double data rate (DDR) applications, by using de-skewing latches instead of flip-flop banks. A PSR based subsystem for 40% savings in clocking power with 40% driver active area reduction xii is demonstrated. This new resonant driver generates tracking pulses at each transition of clock for dual edge operation across DVFS. PSR clocking is designed to drive explicit-pulsed latches with negative setup time. Simulations using 45nm IBM/PTM device and interconnect technology models, clocking 1024 flip-flops show the reductions, compared to non-resonant clocking. DVFS range from 2GHz/1.3V to 200MHz/0.5V is obtained. The PSR frequency is set \u3e3× the clock rate, needing only 1/10th the inductance of prior-art LC resonance schemes. The skew reductions are achieved without needing to increase the interconnect widths owing to negative set-up times. Applications in data circuits are shown as well with a 90nm example. Parallel resonant and split-driver non-resonant configurations as well are derived from GSR. Tradeoffs in timing performance versus power, based on theoretical analysis, are compared for the first time and verified. This enables synthesis of an optimal topology for a given application from the GSR

Intelligent Circuits and Systems

ICICS-2020 is the third conference initiated by the School of Electronics and Electrical Engineering at Lovely Professional University that explored recent innovations of researchers working for the development of smart and green technologies in the fields of Energy, Electronics, Communications, Computers, and Control. ICICS provides innovators to identify new opportunities for the social and economic benefits of society.　 This conference bridges the gap between academics and R&D institutions, social visionaries, and experts from all strata of society to present their ongoing research activities and foster research relations between them. It provides opportunities for the exchange of new ideas, applications, and experiences in the field of smart technologies and finding global partners for future collaboration. The ICICS-2020 was conducted in two broad categories, Intelligent Circuits & Intelligent Systems and Emerging Technologies in Electrical Engineering

Energy Efficiency in Communications and Networks

The topic of "Energy Efficiency in Communications and Networks" attracts growing attention due to economical and environmental reasons. The amount of power consumed by information and communication technologies (ICT) is rapidly increasing, as well as the energy bill of service providers. According to a number of studies, ICT alone is responsible for a percentage which varies from 2% to 10% of the world power consumption. Thus, driving rising cost and sustainability concerns about the energy footprint of the IT infrastructure. Energy-efficiency is an aspect that until recently was only considered for battery driven devices. Today we see energy-efficiency becoming a pervasive issue that will need to be considered in all technology areas from device technology to systems management. This book is seeking to provide a compilation of novel research contributions on hardware design, architectures, protocols and algorithms that will improve the energy efficiency of communication devices and networks and lead to a more energy proportional technology infrastructure

ReSCon '12, Research Student Conference: Book of Abstracts

The fifth SED Research Student Conference (ReSCon2012) was hosted over three days, 18-20 June 2012, in the Hamilton Centre at Brunel University. The conference consisted of 130 oral and 70 poster presentations, based on the high quality and diverse research being conducted within the School of Engineering and Design by postgraduate research students. The conference is held annually, and ReSCon plays a key role in contributing to research and innovations within the School

Multi-agent system based active distribution networks

This thesis gives a particular vision of the future power delivery system with its main requirements. An investigation of suitable concepts and technologies which creates a road map forward the smart grid has been carried out. They should meet the requirements on sustainability, efficiency, flexibility and intelligence. The so called Active Distribution Network (ADN) is introduced as an important element of the future power delivery system. With an open architecture, the ADN is designed to integrate various types of networks, i.e., MicroGrid or Autonomous Network, and different forms of operation, i.e., islanding or interconnection. By enabling an additional local control layer, these so called cells are able to reconfigure, manage local faults, support voltage regulation, or manage power flow. Furthermore, the Multi-Agent System (MAS) concept is regarded as a potential technology to cope with the anticipated challenges of future grid operation. Analysis of benefits and challenges of implementing MAS shows that it is a suitable technology for a complex and highly dynamic operation and open architecture as the ADN. By taking advantages of the MAS technology, the AND is expected to fully enable distributed monitoring and control functions. This MAS-based ADN focuses mainly on control strategies and communication topologies for the distribution systems. The transition to the proposed concept does not require an intensive physical change to the existing infrastructure. The main point is that inside the MAS-based ADN, loads and generators interact with each other and the outside world. This infrastructure can be built up of several cells (local areas) that are able to operate autonomously by an additional agent-based control layer. The ADN adapts a MAS hierarchical control structure in which each agent handles three functional layers of management, coordination, and execution. In the operational structure, the ADN addresses two main function parts: Distributed State Estimation (DSE) to analyze the network topology, compute the state estimation, and detect bad data; and Local Control Scheduling (LCS) to establish the control set points for voltage coordination and power flow management. Under the distributed context of the controls, an appropriate method for DSE is proposed. The method takes advantage of the MAS technology to compute iteratively the local state variables through neighbor data measurements. Although using the classical Weighted Least Square (WLS) as a core, the proposed algorithm based on an agent environment distributes drastically computation burden to subtasks of state estimation with only two interactive buses and an interconnection line in between. The accuracy and complexity of the proposed estimation are investigated through both off-line and on-line simulations. Distributed and parallel working of processors improves significantly the computation time. This estimation is also suitable for a meshed configuration of the ADN, which includes more than one interconnection between each pair of the cells. Depending on the availability of a communication infrastructure, it is able to work locally inside the cells or globally for the whole ADN. As a part of the LCS, the voltage control function is investigated in both steady-state and dynamic environments. The autonomous voltage control within each network area (cell) can be deployed by a combination of active and reactive power support of distributed generation (DG). The coordinated voltage control defines the optimal tap setting of the on-load tap changer (OLTC) while comparing amounts of control actions in each area. Based on the sensitivity factors, these negotiations are thoroughly supported in the distributed environment of the MAS platform. To verify the proposed method, both steady-state and dynamic simulations are developed. Simulation results show that the proposed function helps to integrate more DG while mitigating voltage violation effectively. The optimal solution can be reached within a small number of calculation iterations. It opens a possibility to apply the proposed method as an on-line application. Furthermore, a distributed approach for the power flow management function is developed. By converting the power network to a represented graph, the optimal power flow is understood as the well-known minimum cost flow problem. Two fundamental solutions for the minimum cost flow, i.e., the Successive Shortest Path (SSP) algorithm and the Cost-Scaling Push-Relabel (CS-PR) algorithm, are introduced. The SSP algorithm is augmenting the power flow along the shortest path until reaching the capacity of at least one edge. After updating the flow, it finds another shortest path and augments the flow again. The CS-PR algorithm approaches the problem in a different way which is scaling cost and pushing as much flow as possible at each active node. Simulations of both meshed and radial test networks are developed to compare their performances in various network conditions. Simulation results show that the two methods can allow both generation and power flow controller devices to operate optimally. In the radial test network, the CS-PR needs less computation effort represented by a number of exchanged messages among the MAS platform than the SSP. Their performances in the meshed network are, however, almost the same. Last but not least, this novel concept of MAS-based AND is verified under a laboratory environment. The lab set-up separates some local network areas by using a three-inverter system. The MAS platform is created on different computers and is able to retrieve data from and to hardware components, i.e., the three-inverter system. In this set-up, a configuration of the power router is established in a combination of the three-inverter system with the MAS platform. Three control functions of the inverters, AC voltage control, DC bus voltage control, and PQ control, are developed in a Simulink diagram. By assigning suitable operation modes for the inverters, the set-up successfully experiments on synchronizing and disconnecting a cell to the rest of the grid. In the MAS platform, an obvious power routing strategy is executed to optimally manage power flow in the lab set-up. The results show that the proposed concept of the ADN with the power router interface works well and can be used to manage electrical networks with distributed generation and controllable loads, leading to active networks

High Performance Optical Transmitter Ffr Next Generation Supercomputing and Data Communication

High speed optical interconnects consuming low power at affordable prices are always a major area of research focus. For the backbone network infrastructure, the need for more bandwidth driven by streaming video and other data intensive applications such as cloud computing has been steadily pushing the link speed to the 40Gb/s and 100Gb/s domain. However, high power consumption, low link density and high cost seriously prevent traditional optical transceiver from being the next generation of optical link technology. For short reach communications, such as interconnects in supercomputers, the issues related to the existing electrical links become a major bottleneck for the next generation of High Performance Computing (HPC). Both applications are seeking for an innovative solution of optical links to tackle those current issues. In order to target the next generation of supercomputers and data communication, we propose to develop a high performance optical transmitter by utilizing CISCO Systems®\u27s proprietary CMOS photonic technology. The research seeks to achieve the following outcomes: 1. Reduction of power consumption due to optical interconnects to less than 5pJ/bit without the need for Ring Resonators or DWDM and less than 300fJ/bit for short distance data bus applications. 2. Enable the increase in performance (computing speed) from Peta-Flop to Exa-Flops without the proportional increase in cost or power consumption that would be prohibitive to next generation system architectures by means of increasing the maximum data transmission rate over a single fiber. 3. Explore advanced modulation schemes such as PAM-16 (Pulse-Amplitude-Modulation with 16 levels) to increase the spectrum efficiency while keeping the same or less power figure. This research will focus on the improvement of both the electrical IC and optical IC for the optical transmitter. An accurate circuit model of the optical device is created to speed up the performance optimization and enable co-simulation of electrical driver. Circuit architectures are chosen to minimize the power consumption without sacrificing the speed and noise immunity. As a result, a silicon photonic based optical transmitter employing 1V supply, featuring 20Gb/s data rate is fabricated. The system consists of an electrical driver in 40nm CMOS and an optical MZI modulator with an RF length of less than 0.5mm in 0.13&mu m SOI CMOS. Two modulation schemes are successfully demonstrated: On-Off Keying (OOK) and Pulse-Amplitude-Modulation-N (PAM-N N=4, 16). Both versions demonstrate signal integrity, interface density, and scalability that fit into the next generation data communication and exa-scale computing. Modulation power at 20Gb/s data rate for OOK and PAM-16 of 4pJ/bit and 0.25pJ/bit are achieved for the first time of an MZI type optical modulator, respectively

Wind energy harvester interface for sensor nodes

The research topic is developping a power converting interface for the novel FLEHAP wind energy harvester allowing the produced energy to be used for powering small wireless nodes. The harvester\u2019s electrical characteristics were studied and a strategy was developped to control and mainting a maximum power transfer. The electronic power converter interface was designed, containing an AC/DC Buck-Boost converter and controlled with a low power microcontroller. Different prototypes were developped that evolved by reducing the sources of power loss and rendering the system more efficient. The validation of the system was done through simulations in the COSMIC/DITEN lab using generated signals, and then follow-up experiments were conducted with a controllable wind tunnel in the DIFI department University of Genoa. The experiment results proved the functionality of the control algorithm as well as the efficiency that was ramped up by the hardware solutions that were implemented, and generally met the requirement to provide a power source for low-power sensor nodes

Design of a wireless monitoring system based on the ZigBee protocol for photovoltaic systems

This thesis was submitted for the degree of Master of Philosophy and awarded by Brunel University.This work deals with the possibility of using the promising technology of wireless sensor networks (WSN) in the field of photovoltaic (PV) plant supervising and monitoring. The knowledge of the status and good working condition of each PV module separately as well as of any component of the PV system will guide in a more efficient way of power management. This work will concentrate on monitoring and controlling as well as healthy operation control of PV panels separately. Data logging will be also available and can be used for reference or statistical purposes. The nature of wireless sensor networks (WSN) offers several advantages on monitoring and controlling applications over other traditional technologies including self-healing, self-organization, and flexibility. The versatility, ease of use, and reliability of a mesh network topology offered by the ZigBee technology that is based on the IEEE 802.15.4 standard, are used in this work to offer the maximum of its capabilities on the system being presented. A set of sensors attached on each PV panel are connected to a wireless ZigBee module. Each PV panel has its own ZigBee device located at its back side. All ZigBee devices forms a network with all the necessary devices of the ZigBee protocol included, such as end devises (RFD), a router (FFD), and a coordinator (COO). An extra ZigBee device might optionally be used to serve the whole system as an Ethernet gateway for making the system able to be connected to the internet. The factors that are being monitored are the panel‟s temperature, the output voltage, and output current. At the router device that operates as a parent for all the end devices, extra monitored factors are the air dust concentration, current irradiance and also the angle of the PV array (in the case of tracking system use).Two controlling outputs (relays) are located at the router device offering the capability of controlling the motors or the actuators of a tracking system

Configurable Low Power Analog Multilayer Perceptron

A configurable, low power analog implementation of a multilayer perceptron (MLP) is presented in this work. It features a highly programmable system that allows the user to create a MLP neural network design of their choosing. In addition to the configurability, this neural network provides the ability of low power operation via analog circuitry in its neurons. The main MLP system is made up of 12 neurons that can be configurable to any number of layers and neurons per layer until all available resources are utilized. The MLP network is fabricated in a standard 0.13 μm CMOS process occupying approximately 1 mm2 of on-chip area. The MLP system is analyzed at several different configurations with all achieving a greater than 1 Tera-operations per second per Watt figure of merit. This work offers a high speed, low power, and scalable alternative to digital configurable neural networks