Integrated Worst-Case Execution Time Estimation of Multicore Applications

Worst-case execution time (WCET) analysis has reached a high level of precision in the analysis of sequential programs executing on single-cores. In this paper we extend a state-of-the-art WCET analysis technique to compute tight WCETs estimates of parallel applications running on multicores. The proposed technique is termed integrated because it considers jointly the sequential code regions running on the cores and the communications between them. This allows to capture the hardware effects across code regions assigned to the same core, which significantly improves analysis precision. We demonstrate that our analysis produces tighter execution time bounds than classical techniques which first determine the WCET of sequential code regions and then compute the global response time by integrating communication costs. Comparison is done on two embedded control applications, where the gain is of 21% on average

Contention in multicore hardware shared resources: Understanding of the state of the art

The real-time systems community has over the years devoted considerable attention to the impact on execution timing that arises from contention on access to hardware shared resources. The relevance of this problem has been accentuated with the arrival of multicore processors. From the state of the art on the subject, there appears to be considerable diversity in the understanding of the problem and in the “approach” to solve it. This sparseness makes it difficult for any reader to form a coherent picture of the problem and solution space. This paper draws a tentative taxonomy in which each known approach to the problem can be categorised based on its specific goals and assumptions.Postprint (published version

Techniques to Tighten the Upper Bound on the ExecutionTime of Task-based Parallel Applications

To use multiprocessors in hard real-time systems, schedulability analysis is needed to provide formally proven guarantees for the timing behavior of the system. Programming models for parallel applications, such as OpenMP, use pragmas to specify parts of the application as parallel tasks, for example, a function or a body of a loop. Worst-case-execution-time (WCET) analysis is used to find a safe upper bound of the execution time of a task (i.e., sequential code). However, determining a safe upper bound on the execution time of the entire parallel application on a multiprocessor platform, called the makespan, is a challenging problem.Parallel applications can be modeled as directed acyclic graphs (DAG) (nodes are tasks and edges dependencies) where every node is characterized by its WCET. On a homogeneous platform, the simulation of a greedy, i.e., work-conserving schedule cannot be used as a safe upper bound on the execution time due to timing anomalies. Timing anomalies is the main obstacle to calculate a safe upper bound of the makespan which is necessary to provide timing guarantees for parallel real-time applications. In the presence of timing anomalies, analytical approaches, with pessimistic assumptions for the schedule of the tasks, are commonly used by related work to calculate a safe upper abound of the makespan on a homogeneous platform.This thesis first provides a simulation based approach to calculate the makespan, with the use of time predictable and dynamic schedulers. A first contribution is a scheduler called Strict Lazy that fulfills the basic requirements to provide a timing anomaly-free schedule. As a result, a safe estimation of the makespan for homogeneous multiprocessors is calculated. Furthermore, the thesis builds upon Strict Lazy to develop another scheduler, called the Lazy scheduler that, has proven to be timing anomaly-free. As a result, the simulation of the schedule of a DAG with Lazy where all the nodes are executed for their WCET calculates a safe upper bound of the makespan. The proposed approach provides tighter and more scalable (to the number of processors) makespan estimations compared to the state-of-the-art.A heterogeneous multiprocessor model is more general than a homogeneous multiprocessor model as it can cover a broad range of multiprocessor platforms including platforms with single instruction set architecture (ISA) but different microarchitectures, coexistence of processors with different ISAs and architectures with special-purpose accelerators. To the best of our knowledge, no earlier work considers the problem of how to calculate the makespan for schedules on unrelated multiprocessor platforms. This thesis finally proposes a polynomial time complexity, closed-form, combinatorial method to calculate a safe upper bound of the makespan of DAGs for the unrelated multiprocessor model. The proposed method is applicable to a wide range of already used and future coming schedulers and is reducible to the state-of-art for homogeneous and related models

Timing Analysis of Parallel Software Using Abstract Execution

Abstract. A major trend in computer architecture is multi-core processors. To fully exploit this type of parallel processor chip, programs running on it will have to be parallel as well. This means that even hard real-time embedded systems will be parallel. Therefore, it is of utmost importance that methods to analyze the timing properties of parallel real-time systems are developed. This paper presents an algorithm that is founded on abstract interpretation and derives safe approximations of the execution times of parallel programs. The algorithm is formulated and proven correct for a simple parallel language with parallel threads, shared memory and synchronization via locks