A Compact Semi-Lumped Tunable Complex Impedance Transformer

International audienceThis article describes the design and performance of a compact tunable impedance transformer. The structure is based on a transmission line loaded by varactor diodes. Using only two pairs of diodes, the circuit is very small with a total length of only λ/10. Both the frequency range and the load impedance can be tuned by varying the varactor bias voltages. Our design provides a tunable operating frequency range of ± 40% and an impedance match ranging from 20 Ω to 90 Ω at 0.8 GHz and from 30 Ω to 170 Ω at 1.5 GHz. In addition, a new approach that considers losses for the simulation and measurement of this impedance transformer was investigated. The measured performance of a 1 GHz prototype design confirmed the validity of this new approach

Efficient and Linear CMOS Power Amplifier and Front-end Design for Broadband Fully-Integrated 28-GHz 5G Phased Arrays

Demand for data traffic on mobile networks is growing exponentially with time and on a global scale. The emerging fifth-generation (5G) wireless standard is being developed with millimeter-wave (mm-Wave) links as a key technological enabler to address this growth by a 2020 time frame. The wireless industry is currently racing to deploy mm-Wave mobile services, especially in the 28-GHz band. Previous widely-held perceptions of fundamental propagation limitations were overcome using phased arrays. Equally important for success of 5G is the development of low-power, broadband user equipment (UE) radios in commercial-grade technologies. This dissertation demonstrates design methodologies and circuit techniques to tackle the critical challenge of key phased array front-end circuits in low-cost complementary metal oxide semiconductor (CMOS) technology. Two power amplifier (PA) proof-of-concept prototypes are implemented in deeply scaled 28- nm and 40-nm CMOS processes, demonstrating state-of-the-art linearity and efficiency for extremely broadband communication signals. Subsequently, the 40 nm PA design is successfully embedded into a low-power fully-integrated transmit-receive front-end module. The 28 nm PA prototype in this dissertation is the first reported linear, bulk CMOS PA targeting low-power 5G mobile UE integrated phased array transceivers. An optimization methodology is presented to maximizing power added efficiency (PAE) in the PA output stage at a desired error vector magnitude (EVM) and range to address challenging 5G uplink requirements. Then, a source degeneration inductor in the optimized output stage is shown to further enable its embedding into a two-stage transformer-coupled PA. The inductor helps by broadening inter-stage impedance matching bandwidth, and helping to reduce distortion. Designed and fabricated in 1P7M 28 nm bulk CMOS and using a 1 V supply, the PA achieves +4.2 dBm/9% measured Pout/PAE at −25 dBc EVM for a 250 MHz-wide, 64-QAM orthogonal frequency division multiplexing (OFDM) signal with 9.6 dB peak-to-average power ratio (PAPR). The PA also achieves 35.5%/10% PAE for continuous wave signals at saturation/9.6dB back-off from saturation. To the best of the author’s knowledge, these are the highest measured PAE values among published K- and K a-band CMOS PAs to date. To drastically extend the communication bandwidth in 28 GHz-band UE devices, and to explore the potential of CMOS technology for more demanding access point (AP) devices, the second PA is demonstrated in a 40 nm process. This design supports a signal radio frequency bandwidth (RFBW) >3× the state-of-the-art without degrading output power (i.e. range), PAE (i.e. battery life), or EVM (i.e. amplifier fidelity). The three-stage PA uses higher-order, dual-resonance transformer matching networks with bandwidths optimized for wideband linearity. Digital gain control of 9 dB range is integrated for phased array operation. The gain control is a needed functionality, but it is largely absent from reported high-performance mm-Wave PAs in the literature. The PA is fabricated in a 1P6M 40 nm CMOS LP technology with 1.1 V supply, and achieves Pout/PAE of +6.7 dBm/11% for an 8×100 MHz carrier aggregation 64-QAM OFDM signal with 9.7 dB PAPR. This PA therefore is the first to demonstrate the viability of CMOS technology to address even the very challenging 5G AP/downlink signal bandwidth requirement. Finally, leveraging the developed PA design methodologies and circuits, a low power transmit-receive phased array front-end module is fully integrated in 40 nm technology. In transmit-mode, the front-end maintains the excellent performance of the 40 nm PA: achieving +5.5 dBm/9% for the same 8×100 MHz carrier aggregation signal above. In receive-mode, a 5.5 dB noise figure (NF) and a minimum third-order input intercept point (IIP₃) of −13 dBm are achieved. The performance of the implemented CMOS frontend is comparable to state-of-the-art publications and commercial products that were very recently developed in silicon germanium (SiGe) technologies for 5G communication

A Wideband 77-GHz, 17.5-dBm Fully Integrated Power Amplifier in Silicon

A 77-GHz, +17.5 dBm power amplifier (PA) with fully integrated 50-Ω input and output matching and fabricated in a 0.12-µm SiGe BiCMOS process is presented. The PA achieves a peak power gain of 17 dB and a maximum single-ended output power of 17.5 dBm with 12.8% of power-added efficiency (PAE). It has a 3-dB bandwidth of 15 GHz and draws 165 mA from a 1.8-V supply. Conductor-backed coplanar waveguide (CBCPW) is used as the transmission line structure resulting in large isolation between adjacent lines, enabling integration of the PA in an area of 0.6 mm^2. By using a separate image-rejection filter incorporated before the PA, the rejection at IF frequency of 25 GHz is improved by 35 dB, helping to keep the PA design wideband

High-Performance Compact Diplexers for Ku/K-Band Satellite Applications

[EN] In this paper, two novel compact diplexers for satellite applications are presented. The first covers the Ku-band with two closely spaced channels (Ku-transmission band: 10.7-13 GHz and Ku-reception band: 13.75-14.8 GHz). The second is wider than the first (overall bandwidth up to 50%) achieves the suppression of the higher order modes, and covers the Ku/K-band with a reception channel between 17.2 and 18.5 GHz. Both diplexers are composed of two novel bandpass filters, joined together with an E-plane T-junction. The bandpass filters are designed by combining a low-pass filtering function (based lambda/4-step-shaped band-stop elements separated by very short waveguide sections) and a high-pass filtering structure (based on the waveguide propagation cutoff effect). The novel diplexers show a very compact footprint and very relaxed fabrication tolerances, and are especially attractive for wideband applications. A prototype Ku/K-band diplexer has also been fabricated by milling. Measurements show a very good agreement with simulations, thereby demonstrating the validity and manufacturing robustness of the proposed topology.The authors would like to thank the European High RF Power Space Laboratory, European Space Agency and Val Space Consortium for contributing with its measuring installations-Laboratory co-funded by the European Regional Development Fund-A way of making Europe. This work was supported by the Spanish Ministry of Economy and Competitiveness under Project TEC2014-55735-C3-R and Project TEC2013-47037-C5-1-R.Teberio, F.; Arregui, I.; Soto Pacheco, P.; Laso, MA.; Boria Esbert, VE.; Guglielmi, M. (2017). High-Performance Compact Diplexers for Ku/K-Band Satellite Applications. IEEE Transactions on Microwave Theory and Techniques. 65(10):3866-3876. https://doi.org/10.1109/TMTT.2017.2691773S38663876651

Distributed Transformers for Broadband Monolithic Millimeter-Wave Integrated Power Amplifiers

Die vorliegende Arbeit beschreibt Methoden und Techniken zur Optimierung und Realisierung von verteilten magnetischen Transformatoren für deren Einsatz in Anpassnetzwerken von Monolithischen Integrierten Millimeterwellenschaltungen (engl. MMICs). Es werden Strategien für die Effizienz- und Bandbreitenoptimierung verteilter Transformatoren vorgestellt. Diese werden mit Hilfe einer optimierten Transformatorgeometrie verifiziert und anhand von zwei MMIC Leistungsverstärkern demonstriert

Additive manufacturing of a compact Ku-band orthomode transducer

This work presents a compact ortho-mode transducer (OMT) built by additive manufacturing in a single-block, reducing the number of parts and flanges and improving the losses and power handling capability. The single-block approach also reduces potential passive intermodulation issues since the number of interfaces between parts is minimized. The presented OMT is based on the T-junction topology, with a short-circuited common circular waveguide where the two rectangular waveguides ports are attached. Both ports are arranged in opposite direction to maintain a symmetry plane for the whole structure in order to obtain a high isolation. Specific matching elements are introduced for each polarization to route the orthogonal modes to the common waveguide. The device is built by Selective Laser Melting (SLM), which imposes a set of specific mechanical restrictions to the 3D model of the OMT. The proposed design incorporates those restrictions, simplifying the geometry of the OMT as much as possible (especially the routing elements) to simplify the manufacturing. After this process, the experimental results show an OMT working in the band from 13.4 to 15.6 GHz (15.2%) with a return loss level higher than 20 dB for both polarizations, insertion loss lower than 0.18 dB and isolation between polarizations better than 45 dB. The OMT has also been tested in radiation connected to a reference horn, measuring a cross-polarization lower than -45 dB. This experimental performance shows that the proposed combination of compact design with single-block SLM manufacturing provides tested results similar to those obtained by high-accuracy milling or spark erosion suitable for satellite applicationsThis work was supported by the Spanish Government under grant TEC2016-76070-C3-1/2-R (Agencia Estatal de Investigación, Fondo Europeo de Desarrollo Regional: AEI/FEDER, UE

Impedance Transformers

Non

Development of planar filters and diplexers for wireless transceiver front ends

The central theme of this work is the design of compact microstrip bandpass filters and diplexers and the investigation of applications of these circuits in integrated transceiver RF front-end. The core of this thesis therefore presents the following stages of the work: - Analysis of coupled pseudo-interdigital resonators and lines; formulation of approximate transmission zero conditions and the investigation of coupling between these two resonators and related structures. - Development of compact, low loss and high selectivity microstrip pseudointerdigital bandpass filters. The design procedure of the filter consists of three simple steps, starting from the design of a parallel-coupled bandpass filter using the image parameter method applied to coupled microstrip lines. The development of compact microstrip diplexers composed of these filters uses the optimized common-transformer diplexing technique. An experimental verification of the developed filters and diplexers is made. - Investigation of the use of stepped impedance resonators (SIR) for the design of pseudo-interdigital bandpass filters with advanced characteristics. The design of compact dual-band filter using SIR. The investigation of possible improvement of the stopband of bandpass filters using bandstop generating structures. The application of SIR, defected ground structures (DGS), spur-lines, and opencircuited stubs in the design of compact bandpass filters with improved stopband. - The application of the proposed filters and diplexers in the design of integrated antenna filters and antenna diplexers. Improvement of performance of patch antennas, such as suppression of spurious harmonics of single-band antenna and improvement of bandwidth and selectivity of dual-band antenna, as a result of integration with filters. Separation of antennas’ bands and reduction of component count in integrated antenna diplexer