61 research outputs found

    Methods and architectures based on modular redundancy for fault-tolerant combinational circuits

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    Dans cette thèse, nous nous intéressons à la recherche d architectures fiables pour les circuits logiques. Par fiable , nous entendons des architectures permettant le masquage des fautes et les rendant de ce fait tolérantes" à ces fautes. Les solutions pour la tolérance aux fautes sont basées sur la redondance, d où le surcoût qui y est associé. La redondance peut être mise en oeuvre de différentes manières : statique ou dynamique, spatiale ou temporelle. Nous menons cette recherche en essayant de minimiser tant que possible le surcoût matériel engendré par le mécanisme de tolérance aux fautes. Le travail porte principalement sur les solutions de redondance modulaire, mais certaines études développées sont beaucoup plus générales.In this thesis, we mainly take into account the representative technique Triple Module Redundancy (TMR) as the reliability improvement technique. A voter is an necessary element in this kind of fault-tolerant architectures. The importance of reliability in majority voter is due to its application in both conventional fault-tolerant design and novel nanoelectronic systems. The property of a voter is therefore a bottleneck since it directly determines the whole performance of a redundant fault-tolerant digital IP (such as a TMR configuration). Obviously, the efficacy of TMR is to increase the reliability of digital IP. However, TMR sometimes could result in worse reliability than a simplex function module could. A better understanding of functional and signal reliability characteristics of a 3-input majority voter (majority voting in TMR) is studied. We analyze them by utilizing signal probability and boolean difference. It is well known that the acquisition of output signal probabilities is much easier compared with the obtention of output reliability. The results derived in this thesis proclaim the signal probability requirements for inputs of majority voter, and thereby reveal the conditions that TMR technique requires. This study shows the critical importance of error characteristics of majority voter, as used in fault-tolerant designs. As the flawlessness of majority voter in TMR is not true, we also proposed a fault-tolerant and simple 2-level majority voter structure for TMR. This alternative architecture for majority voter is useful in TMR schemes. The proposed solution is robust to single fault and exceeds those previous ones in terms of reliability.PARIS-Télécom ParisTech (751132302) / SudocSudocFranceF

    Characterization of Interconnection Delays in FPGAS Due to Single Event Upsets and Mitigation

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    RÉSUMÉ L’utilisation incessante de composants électroniques à géométrie toujours plus faible a engendré de nouveaux défis au fil des ans. Par exemple, des semi-conducteurs à mémoire et à microprocesseur plus avancés sont utilisés dans les systèmes avioniques qui présentent une susceptibilité importante aux phénomènes de rayonnement cosmique. L'une des principales implications des rayons cosmiques, observée principalement dans les satellites en orbite, est l'effet d'événements singuliers (SEE). Le rayonnement atmosphérique suscite plusieurs préoccupations concernant la sécurité et la fiabilité de l'équipement avionique, en particulier pour les systèmes qui impliquent des réseaux de portes programmables (FPGA). Les FPGA à base de cellules de mémoire statique (SRAM) présentent une solution attrayante pour mettre en oeuvre des systèmes complexes dans le domaine de l’avionique. Les expériences de rayonnement réalisées sur les FPGA ont dévoilé la vulnérabilité de ces dispositifs contre un type particulier de SEE, à savoir, les événements singuliers de changement d’état (SEU). Un SEU est considérée comme le changement de l'état d'un élément bistable (c'est-à-dire, un bit-flip) dû à l'effet d'un ion, d'un proton ou d’un neutron énergétique. Cet effet est non destructif et peut être corrigé en réécrivant la partie de la SRAM affectée. Les changements de délai (DC) potentiels dus aux SEU affectant la mémoire de configuration de routage ont été récemment confirmés. Un des objectifs de cette thèse consiste à caractériser plus précisément les DC dans les FPGA causés par les SEU. Les DC observés expérimentalement sont présentés et la modélisation au niveau circuit de ces DC est proposée. Les circuits impliqués dans la propagation du délai sont validés en effectuant une modélisation précise des blocs internes à l'intérieur du FPGA et en exécutant des simulations. Les résultats montrent l’origine des DC qui sont en accord avec les mesures expérimentales de délais. Les modèles proposés au niveau circuit sont, aux meilleures de notre connaissance, le premier travail qui confirme et explique les délais combinatoires dans les FPGA. La conception d'un circuit moniteur de délai pour la détection des DC a été faite dans la deuxième partie de cette thèse. Ce moniteur permet de détecter un changement de délai sur les sections critiques du circuit et de prévenir les pannes de synchronisation engendrées par les SEU sans utiliser la redondance modulaire triple (TMR).----------ABSTRACT The unrelenting demand for electronic components with ever diminishing feature size have emerged new challenges over the years. Among them, more advanced memory and microprocessor semiconductors are being used in avionic systems that exhibit a substantial susceptibility to cosmic radiation phenomena. One of the main implications of cosmic rays, which was primarily observed in orbiting satellites, is single-event effect (SEE). Atmospheric radiation causes several concerns regarding the safety and reliability of avionics equipment, particularly for systems that involve field programmable gate arrays (FPGA). SRAM-based FPGAs, as an attractive solution to implement systems in aeronautic sector, are very susceptible to SEEs in particular Single Event Upset (SEU). An SEU is considered as the change of the state of a bistable element (i.e., bit-flip) due to the effect of an energetic ion or proton. This effect is non-destructive and may be fixed by rewriting the affected part. Sensitivity evaluation of SRAM-based FPGAs to a physical impact such as potential delay changes (DC) has not been addressed thus far in the literature. DCs induced by SEU can affect the functionality of the logic circuits by disturbing the race condition on critical paths. The objective of this thesis is toward the characterization of DCs in SRAM-based FPGAs due to transient ionizing radiation. The DCs observed experimentally are presented and the circuit-level modeling of those DCs is proposed. Circuits involved in delay propagation are reverse-engineered by performing precise modeling of internal blocks inside the FPGA and executing simulations. The results show the root cause of DCs that are in good agreement with experimental delay measurements. The proposed circuit level models are, to the best of our knowledge, the first work on modeling of combinational delays in FPGAs.In addition, the design of a delay monitor circuit for DC detection is investigated in the second part of this thesis. This monitor allowed to show experimentally cumulative DCs on interconnects in FPGA. To this end, by avoiding the use of triple modular redundancy (TMR), a mitigation technique for DCs is proposed and the system downtime is minimized. A method is also proposed to decrease the clock frequency after DC detection without interrupting the process

    Validation Methods for Fault-Tolerant avionics and control systems, working group meeting 1

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    The proceedings of the first working group meeting on validation methods for fault tolerant computer design are presented. The state of the art in fault tolerant computer validation was examined in order to provide a framework for future discussions concerning research issues for the validation of fault tolerant avionics and flight control systems. The development of positions concerning critical aspects of the validation process are given

    PhysioSim – A Full Hard- And Software Physiological Simulation Environment Applying A Hybrid Approach Based On Hierarchical Modeling Using Algebraic And Differential Systems and Dynamic Bayesian Networks

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    A system for physiological modeling and simulation is presented. The architecture is considering hardware and software support for real-time physiological simulators, which are very important for medical education and risk management. In contrary to other modeling methods, in this work the focus is to provide maximal modeling flexibility and extensibility. This is provided on the one hand by a hierarchical modeling notation in XML and on other hand by extending current methods by dynamic stochastic system modeling. Dynamic Bayesian Networks as well as deterministic system modeling by systems of algebraic and differential equations lead towards a sophisticated environment for medical simulation. Specific simulations of haemodynamics and physiological based pharmacokinetics and pharmacodynamics are performed by the proposed methods, demonstrating the applicability of the approaches. In contrary to physiological modeling and analysis tools, for an educational simulator, the models have to be computed in real-time, which requires extensive design of the hardware and software architecture. For this purpose generic and extensible frameworks have been suggested and realized. All the components together lead to a novel physiological simulator environment, including a dummy, which emulates ECG, SaO2 and IBP vital signals in addition to software signal simulation. The modeling approaches with DBN are furthermore analyzed in the domains of psychological and physiological reasoning, which should be integrated into a common basis for medical consideration. Furthermore the system is used to show new concepts for dependable medical data monitoring, which are strongly related to physiological and psychological simulations

    Robust learning algorithms for spiking and rate-based neural networks

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    Inspired by the remarkable properties of the human brain, the fields of machine learning, computational neuroscience and neuromorphic engineering have achieved significant synergistic progress in the last decade. Powerful neural network models rooted in machine learning have been proposed as models for neuroscience and for applications in neuromorphic engineering. However, the aspect of robustness is often neglected in these models. Both biological and engineered substrates show diverse imperfections that deteriorate the performance of computation models or even prohibit their implementation. This thesis describes three projects aiming at implementing robust learning with local plasticity rules in neural networks. First, we demonstrate the advantages of neuromorphic computations in a pilot study on a prototype chip. Thereby, we quantify the speed and energy consumption of the system compared to a software simulation and show how on-chip learning contributes to the robustness of learning. Second, we present an implementation of spike-based Bayesian inference on accelerated neuromorphic hardware. The model copes, via learning, with the disruptive effects of the imperfect substrate and benefits from the acceleration. Finally, we present a robust model of deep reinforcement learning using local learning rules. It shows how backpropagation combined with neuromodulation could be implemented in a biologically plausible framework. The results contribute to the pursuit of robust and powerful learning networks for biological and neuromorphic substrates

    Sensors Fault Diagnosis Trends and Applications

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    Fault diagnosis has always been a concern for industry. In general, diagnosis in complex systems requires the acquisition of information from sensors and the processing and extracting of required features for the classification or identification of faults. Therefore, fault diagnosis of sensors is clearly important as faulty information from a sensor may lead to misleading conclusions about the whole system. As engineering systems grow in size and complexity, it becomes more and more important to diagnose faulty behavior before it can lead to total failure. In the light of above issues, this book is dedicated to trends and applications in modern-sensor fault diagnosis

    A comprehensive review of electricity storage applications in island systems

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    Electricity storage is crucial for power systems to achieve higher levels of renewable energy penetration. This is especially significant for non-interconnected island (NII) systems, which are electrically isolated and vulnerable to the fluctuations of intermittent renewable generation. This paper comprehensively reviews existing literature on electricity storage in island systems, documenting relevant storage applications worldwide and emphasizing the role of storage in transitioning NII towards a fossil-fuel-independent electricity sector. On this topic, the literature review indicates that the implementation of storage is a prerequisite for attaining renewable penetration rates of over 50% due to the amplified requirements for system flexibility and renewable energy arbitrage. The analysis also identifies potential storage services and classifies applicable storage architectures for islands. Amongst the available storage designs, two have emerged as particularly important for further investigation; standalone, centrally managed storage stations and storage combined with renewables to form a hybrid plant that operates indivisibly in the market. For each design, the operating principles, remuneration schemes, investment feasibility, and applications discussed in the literature are presented in-depth, while possible implementation barriers are acknowledged. The literature on hybrid power plants mainly focuses on wind-powered pumped-hydro stations. However, recently, PV-powered battery-based hybrid plants have gained momentum due to the decreasing cost of Li-ion technology. On the other hand, standalone storage establishments rely heavily on battery technology and are mainly used to provide flexibility to the island grid. Nevertheless, these investments often suffer from insufficient remunerating frameworks, making it challenging for storage projects to be financially secure.Comment: 55 pages, 10 figure

    Technical accomplishments of the NASA Lewis Research Center, 1989

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    Topics addressed include: high-temperature composite materials; structural mechanics; fatigue life prediction for composite materials; internal computational fluid mechanics; instrumentation and controls; electronics; stirling engines; aeropropulsion and space propulsion programs, including a study of slush hydrogen; space power for use in the space station, in the Mars rover, and other applications; thermal management; plasma and radiation; cryogenic fluid management in space; microgravity physics; combustion in reduced gravity; test facilities and resources
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