Using Modified Bessel Functions for Analysis of Nonlinear Effects in a MOS Transistor Operating in Moderate Inversion

This work was supported in part by the NSERC, Canada, in part by the Portuguese Foundation for Science and Technology under Project PESTOEEEI/UI0066/2015 and foRESTER Project PCIF/SSI/0102/2017, and in part by the Academy of Finland.This paper describes analysis of nonlinear effects in a MOS transistor operating in moderate inversion and saturation. The dependence of the drain current on the gate-source and drain-source voltages is described using a modified version of the 'reconciliation' model developed by Y. Tsividis. In the new model, the current components, which correspond to the terms depending exponentially on normalized gate-source or drain-source modulating sinusoidal voltages, are presented using modified Bessel functions. This approach allows one to find the first, second, and third harmonics of the drain current caused by the gate-source or drain-source voltage sinusoidal modulation and find also the intermodulation terms produced by these two modulating voltages. The results are applied to set the requirements to the gate-source and drain-source bias voltages in design of low-distortion and/or low-voltage amplifiers. It is shown that the realization of the stage with the zero value of third-order harmonic requires extremely tight tolerances for the threshold voltage. The suppression of intermodulation terms requires increased drain-source voltage. These recommendations are confirmed by simulations.authorsversionpublishe

Implications of Small Geometry Effects on gm/ID Based Design Methodology for Analog Circuits

International audienceSmall geometry effects have become increasingly important in analog circuits as transistors continue to shrink. As a result, transconductance-to-drain current (gm/ID) transistor parameters are no longer width-independent. In this brief, a procedure to develop “unit-sized” transistors with minimal sensitivity to small geometry effects is proposed. It is shown that by using the “unit-sized” transistors, the impact of small geometry effects on gm/ID dependent parameters such as current density and self gain can be reduced to 3.6 percent and 1.5 percent respectively