A Study of Voltage-Mode and Current-Mode Filters Using Modified Current Feedback Operational Amplifier

Abstract A Study of Voltage-Mode and Current-Mode Filters Using Modified Current Feedback Operational Amplifier Xin Cui There is a prevalent use of current-mode (CM) circuit techniques in analog integrated circuit design, in view of the fact that CM circuits offer certain advantages over voltage-mode (VM) circuits in terms of certain performance parameters such as propagation delay, dynamic range, and bandwidth. The characteristics of a CM circuit make it not so vulnerable to the current demands of IC design trends, such as continuously decreased size and lower DC supply voltages. Therefore, some active devices that could be exploited in both CM and VM circuits have drawn a lot of attention, such as the second generation current conveyor (CCII) and operational transconductance amplifier (OTA). However, a large amount of effort has been made on VM circuits due to their dominant form of signal processing in analog circuit design for the past several decades. The concept of network transposition, introduced by Bhattacharyya and Swamy as early as in 1971, is a powerful technique to convert a VM circuit to a CM one and vice-versa, with little physical circuit alteration and retaining the same performance as its voltage-mode counterpart. It is especially attractive in transforming those circuits that employ active devices which are transposes of themselves, such as OTA or CCII-. Recently, it has been shown in the literature that a new active element, the modified current feedback operational amplifier (MCFOA), is also its own transpose, and hence can be used to design both VM and CM circuits. It is also known that using the same MCFOA, four equivalent realizations are possible for synthesizing a VM filter function, and further, corresponding four CM filter realizations can be obtained utilizing transposition. However, no detailed study has been conducted with regard to the relative performance of the four equivalent VM structures or the corresponding four CM structures, particularly from the point of view of the non-idealness or the parasitic effects of MCFOA on the performance. This thesis presents a thorough study on band-pass filter (BPF) and notch filter (NF) implemented with MCFOA both in the voltage-mode and their transposed current-mode counterparts. The transfer functions of the four configurations of voltage-mode circuits, as well as that of the current-mode circuits, should be the same when the MCFOA is ideal. However, in practice, they are influenced by parasitic parameters. Accordingly, the performances of the band-pass and notch filters are influenced remarkably by the parasitic parameters of the active device, namely, MCFOA, especially the parasitic resistances for low frequency applications. These effects are studied by comparing the theoretical and SPICE simulation results of the four configurations of the voltage- and current-mode BPF and NF using non-ideal MCFOA. In addition, an improved MCFOA that reduces the effect of parasitic resistances is proposed. Performance of BPF and NF are compared among the four configurations of voltage- and current-mode circuits using the improved MCFOA. They are also compared with those using the original version of MCFOA. It is shown that the proposed MCFOA yields several improvements on the performance of both VM and CM BPFs, such as more attenuation at the low frequencies, and drastic reduction in the ω_p and Q_p errors. Based on the fact that MCFOA is composed of two CCIIs (CCII+ and CCII-), and FTFN can be realized with minor modifications of CCII-, it is natural to compare the performance of BPF using CCII- and FTFN with that using MCFOA. Thus, BPF using CCII- and FTFN and their transposed circuits are also studied. As mentioned earlier, CCII- is its own transpose. However, FTFN does not have a proposed admittance or a hybrid matrix for us to find its transpose. An attempt to find the admittance matrix of FTFN is explored in this thesis. The results show that FTFN can be used as its own transpose only under ideal conditions. Comparisons of performance of BPFs using the original MCFOA, the proposed MCFOA, and CCII-, as well as among their transposes, are presented. It is shown that BPF using the proposed MCFOA exhibits the best performance

Intelligent Circuits and Systems

ICICS-2020 is the third conference initiated by the School of Electronics and Electrical Engineering at Lovely Professional University that explored recent innovations of researchers working for the development of smart and green technologies in the fields of Energy, Electronics, Communications, Computers, and Control. ICICS provides innovators to identify new opportunities for the social and economic benefits of society.　 This conference bridges the gap between academics and R&D institutions, social visionaries, and experts from all strata of society to present their ongoing research activities and foster research relations between them. It provides opportunities for the exchange of new ideas, applications, and experiences in the field of smart technologies and finding global partners for future collaboration. The ICICS-2020 was conducted in two broad categories, Intelligent Circuits & Intelligent Systems and Emerging Technologies in Electrical Engineering

Context-Aware Separation Logic

Separation logic is often praised for its ability to closely mimic the locality of state updates when reasoning about them at the level of assertions. The prover only needs to concern themselves with the footprint of the computation at hand, i.e., the part of the state that is actually being accessed and manipulated. Modern concurrent separation logics lift this local reasoning principle from the physical state to abstract ghost state. For instance, these logics allow one to abstract the state of a fine-grained concurrent data structure by a predicate that provides a client the illusion of atomic access to the underlying state. However, these abstractions inadvertently increase the footprint of a computation: when reasoning about a local low-level state update, one needs to account for its effect on the abstraction, which encompasses a possibly unbounded portion of the low-level state. Often this gives the reasoning a global character. We present context-aware separation logic (CASL) to provide new opportunities for local reasoning in the presence of rich ghost state abstractions. CASL introduces the notion of a context of a computation, the part of the concrete state that is only affected on the abstract level. Contexts give rise to a new proof rule that allows one to reduce the footprint by the context, provided the computation preserves the context as an invariant. The context rule complements the frame rule of separation logic by enabling more local reasoning in cases where the predicate to be framed is known in advance. We instantiate our developed theory for the flow framework, which enables local reasoning about global properties of heap graphs. We then use the instantiation to obtain a fully local proof of functional correctness for a sequential binary search tree implementation that is inspired by fine-grained concurrent search structures

Algorithmic Contributions to the Theory of Regular Chains

Regular chains, introduced about twenty years ago, have emerged as one of the major tools for solving polynomial systems symbolically. In this thesis, we focus on different algorithmic aspects of the theory of regular chains, from theoretical questions to high- performance implementation issues. The inclusion test for saturated ideals is a fundamental problem in this theory. By studying the primitivity of regular chains, we show that a regular chain generates its saturated ideal if and only if it is primitive. As a result, a family of inclusion tests can be detected very efficiently. The algorithm to compute the regular GCDs of two polynomials modulo a regular chain is one of the key routines in the various triangular decomposition algorithms. By revisiting relations between subresultants and GCDs, we proposed a novel bottom-up algorithm for this task, which improves the previous algorithm in a significant manner and creates opportunities for parallel execution. This thesis also discusses the accelerations towards fast Fourier transform (FFT) over finite fields and FFT based subresultant chain constructions in the context of massively parallel GPU architectures, which speedup our algorithms by several orders of magnitude

Combining over- and under-approximating program analyses for automatic software testing

This dissertation attacks the well-known problem of path-imprecision in static program analysis. Our starting point is an existing static program analysis that over-approximates the execution paths of the analyzed program. We then make this over-approximating program analysis more precise for automatic testing in an object-oriented programming language. We achieve this by combining the over-approximating program analysis with usage-observing and under-approximating analyses. More specifically, we make the following contributions. We present a technique to eliminate language-level unsound bug warnings produced by an execution-path-over-approximating analysis for object-oriented programs that is based on the weakest precondition calculus. Our technique post-processes the results of the over-approximating analysis by solving the produced constraint systems and generating and executing concrete test-cases that satisfy the given constraint systems. Only test-cases that confirm the results of the over-approximating static analysis are presented to the user. This technique has the important side-benefit of making the results of a weakest-precondition based static analysis easier to understand for human consumers. We show examples from our experiments that visually demonstrate the difference between hundreds of complicated constraints and a simple corresponding JUnit test-case. Besides eliminating language-level unsound bug warnings, we present an additional technique that also addresses user-level unsound bug warnings. This technique pre-processes the testee with a dynamic analysis that takes advantage of actual user data. It annotates the testee with the knowledge obtained from this pre-processing step and thereby provides guidance for the over-approximating analysis. We also present an improvement to dynamic invariant detection for object-oriented programming languages. Previous approaches do not take behavioral subtyping into account and therefore may produce inconsistent results, which can throw off automated analyses such as the ones we are performing for bug-finding. Finally, we address the problem of unwanted dependencies between test-cases caused by global state. We present two techniques for efficiently re-initializing global state between test-case executions and discuss their trade-offs. We have implemented the above techniques in the JCrasher, Check 'n' Crash, and DSD-Crasher tools and present initial experience in using them for automated bug finding in real-world Java programs.Ph.D.Committee Chair: Smaragdakis, Yannis; Committee Member: Dwyer, Matthew; Committee Member: Orso, Alessandro; Committee Member: Pande, Santosh; Committee Member: Rugaber, Spence

Circuit Design and Routing For Field Programmable Analog Arrays

Accurate, low-cost, rapid-prototyping techniques for analog circuits have been a long awaited dream for analog designers. However, due to the inherent nature of analog system, design automation in analog domain is very difficult to realize, and field programmable analog arrays (FPAA) have not achieved the same success as FPGAs in the digital domain. This results from several factors, including the lack of supporting CAD tools, small circuit density, low speed and significant parasitic effect from the fixed routing wires. These factors are all related to each other, making the design of a high performance FPAA a multi-dimension problem. Among others, a critical reason behind these difficulties is the non-ideal programming technology, which contributes a large portion of parasitics into the sensitive analog system, thus degrades the system performance. This work is trying to attack these difficulties with development of a laser field programmable analog array (LFPAA). There are two parts of work involved, routing for FPAA and analog IC building block design. To facilitate the router development and provide a platform for FPAA application development, a generic arrayed based FPAA architecture and a flexible CAB topology were proposed. The routing algorithm was based on a modified and improved pathfinder negotiated routing algorithm, and was implemented in C for a prototype FPAA. The parasitic constraints for performance analog routing were also investigated and solutions were proposed. In the area of analog circuit design, a novel differential difference op amp was invented as the core building block. Two bandgap circuits including a low voltage version were developed to generate a stable reference voltage for the FPAA. Based on the proposed FPAA architecture, several application examples were demonstrated. The results show the flexible functionality of the FPAA. Moreover, various laser Makelink test structures were studied on different CMOS processes and BiCMOS copper process. Laser Makelink proves to be a powerful programming technology for analog IC design. A novel laser Makelink trimming method was invented to reduce the op amp offset. The application of using laser Makelink to reconfigure the analog circuit blocks was presented

User-centered Program Analysis Tools

The research and industrial communities have made great strides in developing advanced software defect detection tools based on program analysis. Most of the work in this area has focused on developing novel program analysis algorithms to find bugs more efficiently or accurately, or to find more sophisticated kinds of bugs. However, the focus on algorithms often leads to tools that are complex and difficult to actually use to debug programs. We believe that we can design better, more useful program analysis tools by taking a user-centered approach. In this dissertation, we present three possible elements of such an approach. First, we improve the user interface by designing Path Projection, a toolkit for visualizing program paths, such as call stacks, that are commonly used to explain errors. We evaluated Path Projection in a user study and found that programmers were able to verify error reports more quickly with similar accuracy, and strongly preferred Path Projection to a standard code viewer. Second, we make it easier for programmers to combine different algorithms to customize the precision or efficiency of a tool for their target programs. We designed Mix, a framework that allows programmers to apply either type checking, which is fast but imprecise, or symbolic execution, which is precise but slow, to different parts of their programs. Mix keeps its design simple by making no modifications to the constituent analyses. Instead, programmers use Mix annotations to mark blocks of code that should be typed checked or symbolically executed, and Mix automatically combines the results. We evaluated the effectiveness of Mix by implementing a prototype called Mixy for C and using it to check for null pointer errors in vsftpd. Finally, we integrate program analysis more directly into the debugging process. We designed Expositor, an interactive dynamic program analysis and debugging environment built on top of scripting and time-travel debugging. In Expositor, programmers write program analyses as scripts that analyze entire program executions, using list-like operations such as map and filter to manipulate execution traces. For efficiency, Expositor uses lazy data structures throughout its implementation to compute results on-demand, enabling a more interactive user experience. We developed a prototype of Expositor using GDB and UndoDB, and used it to debug a stack overflow and to unravel a subtle data race in Firefox