유기발광 다이오드 표시장치를 장착한 이동형 시스템의 전력 공급 최적화

학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2012. 8. 장래혁.오늘날 스마트폰, 태블릿 PC 와 같은 휴대용 전자기기는 고성능의 중앙처리장치 (CPU), 대용량 메모리, 대형 화면, 고속의 무선 인터페이스 등을 탑재함에따라 전 력 소모량이 급속히 증가하여 그 전력 소모는 이미 소형의 랩탑 컴퓨터 수준에 이르고 있다. 성능과 전력 소모량의 측면에서 휴대용 전자기기와 랩탑 컴퓨터 사 이의 구분이 점차 사라지고 있음에도 배터리 및 전력 변환 회로는 기존의 설계 원칙들만을 따라 설계되고 있는 실정이다. 삼성전자의 갤럭시 탭 및 Apple 사의 iPad 등 스마트폰 및 태블릿 PC의 경우 1-cell 직렬 리튬 이온 전지를 사용하는 반 면, 랩탑 컴퓨터의 경우는 제조사에 따라 3-cell 에서 5-cell 직렬 등으로 설계되고 있다. 이는 배터리 출력 전압을 다르게 함으로써 전력 변환 효율에 영향을 준다. 전력 변환 회로의 효율 및 배터리의 수명은 입출력 전압/전류를 비롯한 동작 환경의 영향을 받는다. 휴대용 전자기기에 사용되는 각종 전자부품은 전력 소모를 줄이기 위한 다양한 기능들을 구현하고 있으며, 중앙처리장치의 동적 전압/주파 수 조절 기법 등 공급전압의 변화를 수반하는 기법 역시 다양하게 적용되고 있다. 이는 각 장치의 공급 전압 및 전류의 변화로 인한 전력 변환 회로의 효율의 변화 를 초래한다. 따라서 중앙처리장치, 디스플레이 등 주요 전력 소비 장치의 전력 절감 기법을 개발할 때에는 개별 장치의 전력 소비를 줄이는 것과 동시에 개별 장 치의 동작 행태에 대한 정확한 분석에 기반하여 배터리, 전력 변환회로의 설계가 함께이루어져야 한다. 선행 연구를 통해 배터리의 특성을 고려한 배터리 구성의 최적화 기법이 제안되었다 [1]. 중앙처리장치의 동적 전압/주파수 제어 기법에 이어 유기발광다이오드(OLED) 기반 디스플레이의 동적 구동회로 공급 전압 기법이 제안되었다 [2]. 유기발광다 이오드 디스플레이는 전력 소모 및 시야각 등 기존 액정 표시장치에 비해 여러 우수한 특성으로 인해 주목받고 있는 차세대 디스플레이 장치이다. 유기발광다 이오드 디스플레이의 적은 전력 소모량에도 불구하고 화면의 대형화 및 해상도의 고밀도화에 따라 시스템 전력 소모에서 여전히 큰 비중을 차지하고 있다. 유기발 광다이오드 디스플레이의 동적 구동회로 공급 전압 기법(OLED DVS)는 색상의 변화의 기초한 기존의 유기발광다이오드 디스플레이 전력 절감 기법과는 달리 최 소한의 이미지 왜곡만을 수반하여 대부분의 사진, 동영상 등에 적용가능한 전력 절감 기법이다. 해당 기법은 공급 전압의 변화시킬 필요가 있으며, 이를 시스템에 올바르게 통합시키기 위해서는 전력 변환 회로 및 배터리 구성에 미치는 영향을 고려해야 한다. 본 논문에서는 유기발광다이오드 디스플레이의 전력 소모와 함께 전체 시스 템 효율에 미치는 영향을 함께 고려하여 시스템을 최적화한다. 배터리 구성 역 시 기존의 설계 표준 대신 체계적인 시스템 분석에 기반한 최적화가 시도되었다. 공급전압이 조절 가능한 유기발광다이오드 디스플레이 하드웨어 및 제어기 시스 템-온-칩 (System-on-a-chip, SoC) 가 제작되었고, 그 동작 특성이 분석되었다. 기존 스마트폰 및 태블릿 PC 개발용 플랫폼의 전력 변환 효율 및 동작 특성 역시 분석 되었다. 유기발광다이오드 디스플레이의 동적 구동회로 공급 전압 기법의 동작 특성 및 스마트폰 플랫폼의 동작 특성, 배터리 특성에 대한 분석을 기반으로 시스 템 수준에서의 전력 변환 효율이 최적화되었다.Modern mobile devices such as smartphone or tablet PC are typically equipped a high-performance CPU, memory, wireless interface, and display. As a result, their power consumption is as high as a small-size laptop computer. The boundary between the mobile devices and laptop computer is becoming unclear from the perspective of the performance and power. However, their battery and related power conversion architecture are only designed according to the legacy design so far. Smartphone and tablet PCs from major vendors such as iPad from Apple or Galaxy-tab from Samsung uses 1-cell Li-ion battery. The laptop PC typically has 3-cell Li-ion battery. The output voltage of the battery affect system-level power conversion efficiency. Furthermore, traditional power conversion architecture in the mobile computing system is designed only considering the fixed condition where the system-level low-power techniques such as DVFS are becoming mandatory. Such a low-power techniques applied to the major components result in not only load demand fluctuation but also supply voltage changing. It has an effect on the battery lifetime as well as the system-level power delivery efficiency. The efficiency is affected by the operating condition including input voltage, output voltage, and output current. We should consider the operating condition of the major power consumer such as a display to enhance the system-level power delivery efficiency. Therefore, we need to design the system not only from the perspective of the power consumption but also energy storage design. The optimization of battery setup considering battery characteristics was presented in [1]. Beside the DVFS of microprocessor, a power saving technique based on the supply voltage scaling of the OLED driver circuit was recently introduced [2]. An organic light emitting diode (OLED) is a promising display device which has a lot of advantages compared with conventional LCD, but it still consumes significant amount of power consumption due to the size and resolution increasing. The OLED dynamic voltage scaling (OLED DVS) technique is the first OLED display power saving technique that induces only minimal color change to accommodate display of natural images where the existing OLED low-power techniques are based on the color change. The OLED DVS incurs supply voltage change. Therefore we need to consider the system-level power delivery efficiency and battery setup to properly integrate the DVS-enabled OLED display to the system. In this dissertation, we not only optimize the power consumption of the OLED display but also consider its effect on the whole system power efficiency. We perform the optimization of the battery setup by a systematic method instead of the legacy design rule. At first, we develop an algorithm for the OLED DVS for the still images and a histogram-based online method for the image sequence with a hardware board and a SoC. We characterize the behavior of the OLED DVS. Next, we analyze the characteristics of the smartphone and tablet-PC platforms by using the development platforms. We profile the power consumption of each components in the smartphone and power conversion efficiency of the boost converter which is used in the tablet-PC for the display devices. We optimize not only the power consuming components or the conversion system but also the energy storage system based on the battery model and system-level power delivery efficiency analysis.1 Introduction 1.1 Supply Voltage Scaling for OLED Display 1.2 Power Conversion Efficiency in MobileSystems 1.3 Research Motivation 2 Related Work 2.1 Low-Power Techniques for Display Devices 2.1.1 Light Source Control-Based Approaches 2.1.2 User Behavior-Based Approaches 2.1.3 Low-Power Techniques for Controller and Framebuffer 2.1.4 Pre-ChargingforOLED 2.1.5 ColorRemapping 2.2 Battery discharging efficiency aware low-power techniques 2.2.1 Parallel Connection 2.2.2 Constant-Current Regulator-Based Architecture 2.3 System-level power analysis techniques 3 Preliminary 38 3.1 Organic Light Emitting Diode (OLED) Display 3.1.1 OLED Cell Architecture 3.1.2 OLED Panel Architecture 3.1.3 OLED Driver Circuits 3.2 Effect of VDD scaling on driver circuits 3.2.1 VDD scaling for AM drivers 3.2.2 VDD scaling for PWM drivers 4 Supply Voltage Scaling and Image Compensation of OLED displays 4.1 Image quality and power models of OLED panels 4.2 OLED display characterization 4.3 VDD scaling and image compensation 5 OLED DVS implementation 5.1 Hardware prototype implementation 5.2 OLED DVS System-on-Chip implementation 5.3 Optimization of OLED DVS SoC 5.4 VDD transition overhead 6 Power conversion efficiency and delivery architecture in mobile Systems 6.1 Power conversion efficiency model of switching-Mode DC–DC converters 6.2 Power conversion efficiency model of linear regulator power loss model 6.3 Rate Capacity Effect of Li-ion Batteries 7 Power conversion efficiency-aware battery setup optimization with DVS- enabled OLED display 7.1 System-level power efficiency model 7.2 Power conversion efficiency analysis of smartphone platform 7.3 Power conversion efficiency for OLED power supply 7.4 Li-ion battery model 7.4.1 Battery model parameter extraction 7.5 Battery setup optimization 8 Experiments 8.1 Simulation result for OLED display with AM driver 8.2 Measurement result for OLED display with PWM driver 8.3 Design space exploration of battery setup with OLED displays 9 Conclusion 10 Future WorkDocto

LAPSE: Low-Overhead Adaptive Power Saving and Contrast Enhancement for OLEDs

Organic Light Emitting Diode (OLED) display panels are becoming increasingly popular especially in mobile devices; one of the key characteristics of these panels is that their power consumption strongly depends on the displayed image. In this paper we propose LAPSE, a new methodology to concurrently reduce the energy consumed by an OLED display and enhance the contrast of the displayed image, that relies on image-specific pixel-by-pixel transformations. Unlike previous approaches, LAPSE focuses specifically on reducing the overheads required to implement the transformation at runtime. To this end, we propose a transformation that can be executed in real time, either in software, with low time overhead, or in a hardware accelerator with a small area and low energy budget. Despite the significant reduction in complexity, we obtain comparable results to those achieved with more complex approaches in terms of power saving and image quality. Moreover, our method allows to easily explore the full quality-versus-power tradeoff by acting on a few basic parameters; thus, it enables the runtime selection among multiple display quality settings, according to the status of the system

Implant Activated Source/Drain Regions for Self-Aligned IGZO TFT

In this work, amorphous Indium Gallium Zinc Oxide (IGZO) TFTs with channel lengths scaled as small as L = 1 µm are presented which demonstrate excellent electrical characteristics, however the traditional metal-contact defined source/drain regions typically require several microns of gate overlap in order to provide ohmic behavior with minimal series resistance and ensure tolerance to overlay error. In addition, further scaling the channel length by simply reducing the source/drain metal gap is not feasible. The focus of this study is to investigate techniques to realize self-aligned (SA) IGZO TFTs that are not subject to gate-source/drain misalignment due to overlay error or process bias. Top gate (TG) co-planar and bottom gate (BG) staggered TFTs are fabricated using plasma immersion and ion implantation to selectively form conductive IGZO regions, with the channel region blocked by a gate-defined mask. Among the investigated treatments, oxygen plasma activation and ion implanted activation via 11B+ and 40Ar+ has been successfully demonstrated. Due to metal gate charging during ion implantation of SA-TG devices, the characteristics show a significant left-shift whereas SA-BG devices do not show this behavior. Electrical results suggest a defect-induced mechanism is involved with 40Ar+ implant activation of the S/D regions. However, 11B+ implant activation is attributed to the formation of an electrically active donor species involving chemical bonding. Both boron and argon demonstrate pronounced degradation in charge injection at higher dose treatments. Finally, a novel lithographic strategy which utilizes top-side flood exposure rather than a back-side through-glass exposure has also been explored, which would enable SA-BG devices on non-transparent substrates

A Study on Copper-Gate Integration with Titanium Interface Layers for IGZO TFTs

The continuous demand for ultra-high resolution and improved video performance on increasingly larger active-matrix displays has advanced the research field of thin film transistors (TFTs) materials, processes and devices. Performance improvements demonstrated by amorphous Indium-Gallium-Zinc-Oxide (IGZO) TSTs has enabled a commercialized backplane technology adopted for AM-OLED displays, providing advantage in device performance and uniformity at a much lower cost than Low Temperature Poly-crystalline Silicon (LTPS). However as the display size gets larger and the pixel density increases, charge transfer from the column driver to the pixel through the addressed row TFT within the required time interval becomes increasingly difficult. As the pixel size shrinks and the panel size grows, interconnects that must be scaled down in cross-section have to transport charge over longer distances.In addition, as the numbers of rows increase in a display, the time allowed for charge transfer decreases to maintain a high image refresh frequency. These challenges must be addressed by lower interconnect delay, thus the advantages in transitioning to Cu for long interconnect rows and columns. The gate electrodes are usually implemented as an appendage of the row interconnect, thus Cu-gate TFTS would avoid added process complexity while supporting high-speed interconnects and low production costs. The following work presents a study on Cu-gate integration and potential channel contamination on bottom-gate IGZO TSTs with a newly established baseline process. Cu was used in place to Mo as the gate electrode, with an underlying Ti layer to promote adhesion to the oxidized silicon substrate. The experimental design input factors included the option of a Ti capping layer on the Cu-gate, and the anneal conditions of the gate dielectric (PECVD SiO2) prior to IGZO sputtering. Distinct differences in physical and electrical responses over all treatment combinations were identified. Experimental results demonstrated that while the Ti capping layer promoted adhesion to the gate dielectric, it served as a source of contamination on pre-annealed treatments causing pronounced electrical characteristic shifting and dielectric failure. The anneal process was found to promote adhesion between the Cu-gate and the gate oxide without the use of Ti capping layer, as well as reduce oxide charge levels. Copper contamination did not appear to be an issue in treatment conditions at or below 400C, however pitting of the gate electrode occurred at anneal temperature above 400C, as well as electrical results that suggest evidence of Cu contamination. Visual observations and electrical characteristics are presented wit ha detailed discussion on comparisons between treatment combinations, with reference to the baseline IGZO devices

Low-Overhead Adaptive Brightness Scaling for Energy Reduction in OLED Displays

Organic Light Emitting Diode (OLED) is rapidly emerging as the mainstream mobile display technology. This is posing new challenges on the design of energy-saving solutions for OLED displays, specifically intended for interactive devices such as smartphones, smartwatches and tablets. To this date, the standard solution is brightness scaling. However, the amount of the scaling is typically set statically (either by the user, through a setting knob, or by the system in response to predefined events such as low-battery status) and independently of the displayed image. In this work we describe a smart computing technique called Low-Overhead Adaptive Brightness Scaling (LABS), that overcomes these limitations. In LABS, the optimal content-dependent brightness scaling factor is determined automatically for each displayed image, on a frame-by-frame basis, with a low computational cost that allows real-time usage. The basic form of LABS achieves more than 35% power reduction on average, when applied to different image datasets, while maintaining the Mean Structural Similarity Index (MSSIM) between the original and transformed images above 97%