Ballistic electron microscopy and spectroscopy of metal and semiconductor nanostructures

Ballistic electron emission microscopy (BEEM) and its spectroscopy utilize ballistic transport of hot carriers as a versatile tool to characterize nanometer-scale structural and electronic properties of metallic and semiconducting materials and their interfaces. In this review, recent progress in experimental and theoretical aspects of the BEEM technique are covered. Emphasis is drawn to the development of BEEM in several emerging fields, including spin-sensitive hot-carrier transport through ferromagnetic thin films and multilayers, hot-electron spectroscopy and imaging of organic thin films and molecules, and hot-electron induced electroluminescence in semiconductor heterostructures. A brief discussion on BEEM of cross-sectional semiconductor heterostructures and advanced insulator films is also included

BEEM studies of metal-organic interfaces

Ph.DDOCTOR OF PHILOSOPH

III-V and 2D Devices: from MOSFETs to Steep-Slope Transistors

With silicon CMOS technology approaching the scaling limit, alternating channel materials and novel device structures have been extensively studied and attracted a lot of attention in solid-state device research. In this dissertation, solid-state electron devices for post-Si CMOS applications are explored including both new materials such as III-V and 2D materials and new device structures such as tunneling field-effect transistors and negative capacitance field-effect transistors. Multiple critical challenges in applying such new materials and new device structures are addressed and the key achievements in this dissertation are summarized as follows: 1) Development of fabrication process technology for ultra-scaled planar and 3D InGaAs MOSFETs. 2) Interface passivation by forming gas anneal on InGaAs gate-all-around MOSFETs. 3) Characterization methods for ultra-scaled MOSFETs, including a correction to subthreshold method and low frequency noise characterization in short channel devices. 4) Development of short channel InGaAs planar and 3D gate-allaround tunneling field-effect transistors. 5) Negative capacitance field-effect transistors with hysteresis-free and bi-directional sub-thermionic subthreshold slope and the integration with various channel materials such as InGaAs and MoS2

In-device spectroscopy at metal/organic semiconductor interfaces.

145 p.En esta tesis doctoral nos hemos basado en el estudio de las barreras energéticas presentes en lasinterfaces entre el nivel de Fermi de los metales y los niveles orbitales de semiconductores orgánicos.Este estudio se ha realizado mediante dispositivos electrónicos verticales de tres terminales y mediante lainyección y transporte de cargas eléctricas. De esta forma, hemos podido determinar cómo dichasbarreras energéticas afectan en el transporte eléctrico, lo cual influye directamente en el funcionamiento yeficiencia de dispositivos optoelectrónicos. La determinación de los niveles energéticos relativos devarios orbitales moleculares nos ha llevado a poder determinar directamente la banda de energíaprohibida de varios semiconductores orgánicos. El estudio se ha llevado a cabo con semiconductoresmoleculares y poliméricos tanto el ultra alto vacío como en condiciones ambientales respectivamente.Además de esto, hemos investigado cómo afecta la tensión mecánica en las barreras energéticas entremetales y semiconductores orgánicos. Para esto, hemos fabricado nuestros dispositivos en substratosflexibles y medidos doblados con distintos radios de torsión.En los dispositivos estudiados, las cargas se inyectan balísticamente en el semiconductor. Esta formaúnica de inyectar las cargas nos ha permitido observar en semiconductores orgánicos el Régimen deInversión Marcus. Como consecuencia de este régimen, hemos observado un diferencial de resistencianegativo en medida de corriente versus voltaje. Hemos podido manipular este último fenómeno mediantetemperatura, luz y campo eléctrico.CICnanoGUN

In-device spectroscopy at metal/organic semiconductor interfaces.

145 p.En esta tesis doctoral nos hemos basado en el estudio de las barreras energéticas presentes en lasinterfaces entre el nivel de Fermi de los metales y los niveles orbitales de semiconductores orgánicos.Este estudio se ha realizado mediante dispositivos electrónicos verticales de tres terminales y mediante lainyección y transporte de cargas eléctricas. De esta forma, hemos podido determinar cómo dichasbarreras energéticas afectan en el transporte eléctrico, lo cual influye directamente en el funcionamiento yeficiencia de dispositivos optoelectrónicos. La determinación de los niveles energéticos relativos devarios orbitales moleculares nos ha llevado a poder determinar directamente la banda de energíaprohibida de varios semiconductores orgánicos. El estudio se ha llevado a cabo con semiconductoresmoleculares y poliméricos tanto el ultra alto vacío como en condiciones ambientales respectivamente.Además de esto, hemos investigado cómo afecta la tensión mecánica en las barreras energéticas entremetales y semiconductores orgánicos. Para esto, hemos fabricado nuestros dispositivos en substratosflexibles y medidos doblados con distintos radios de torsión.En los dispositivos estudiados, las cargas se inyectan balísticamente en el semiconductor. Esta formaúnica de inyectar las cargas nos ha permitido observar en semiconductores orgánicos el Régimen deInversión Marcus. Como consecuencia de este régimen, hemos observado un diferencial de resistencianegativo en medida de corriente versus voltaje. Hemos podido manipular este último fenómeno mediantetemperatura, luz y campo eléctrico.CICnanoGUN

OXIDATION OF SILICON - THE VLSI GATE DIELECTRIC

Silicon dominates the semiconductor industry for good reasons. One factor is the stable, easily formed, insulating oxide, which aids high performance and allows practical processing. How well can these virtues survive as new demands are made on integrity, on smallness of feature sizes and other dimensions, and on constraints on processing and manufacturing methods? These demands make it critical to identify, quantify and predict the key controlling growth and defect processes on an atomic scale.The combination of theory and novel experiments (isotope methods, electronic noise, spin resonance, pulsed laser atom probes and other desorption methods, and especially scanning tunnelling or atomic force microscopies) provide tools whose impact on models is just being appreciated. We discuss the current unified model for silicon oxidation, which goes beyond the traditional descriptions of kinetic and ellipsometric data by explicitly addressing the issues raised in isotope experiments. The framework is still the Deal-Grove model, which provides a phenomenology to describe the major regimes of behaviour, and gives a base from which the substantial deviations can be characterized. In this model, growth is limited by diffusion and interfacial reactions operating in series. The deviations from Deal-Grove are most significant for just those first tens of atomic layers of oxide which are critical for the ultra-thin oxide layers now demanded. Several features emerge as important. First is the role of stress and stress relaxation. Second is the nature of the oxide closest to the Si, both its defects and its differences from the amorphous stoichiometric oxide further out, whether in composition, in network topology, or otherwise. Thirdly, we must consider the charge states of both fixed and mobile species. In thin films with very different dielectric constants, image terms can be important; these terms affect interpretation of spectroscopies, the injection of oxidant species and relative defect stabilities. This has added importance now that P-b concentrations have been correlated with interfacial stress. This raises further issues about the perfection of the oxide random network and the incorporation of interstitial species like molecular oxygen.Finally, the roles of contamination, particles, metals, hydrocarbons etc are important, as is interface roughness. These features depend on pre-gate oxide cleaning and define the Si surface that is to be oxidized which may have an influence on the features listed above

Characterization of Graphene Field-Effect Transistors for High Performance Electronics

It is an ongoing effort to improve field-effect transistor (FET) performance. With silicon transistors approaching their physical limitations, alternative materials that can outperform silicon are required. Graphene, has been suggested as such an alternative mainly due to its two-dimensional (2D) structure and high carrier velocities. The band structure limits achievable bandgaps, preventing digital electronic applications. This, however, does not rule out analog electronic applications at high frequencies, where the full potential of improved carrier speeds in graphene can be exploited. In this thesis, the high-bias characteristics of graphene FETs are investigated. Current saturation as well as the effect of ambipolar conduction on the current-voltage characteristics are studied. A field-effect model is developed that can capture the effects of the unique band structure, such as a density-dependent saturation velocity. The effect of channel length scaling in these devices is studied down to 100-nm channel length with the aid of pulsed-measurement techniques. Transistors RF performance and bias dependence of high frequency behavior is explored. Novel fabrications methods are developed to improve FET performance. A technique is developed to grow metal-oxides on graphene surface for efficient gate coupling. An alternative approach to making high quality devices is realized by incorporating hexagonal-boron nitride as a gate dielectric. These transistors exhibit the potential of graphene electronics for high-performance analog electronic applications

Solid State Circuits Technologies

The evolution of solid-state circuit technology has a long history within a relatively short period of time. This technology has lead to the modern information society that connects us and tools, a large market, and many types of products and applications. The solid-state circuit technology continuously evolves via breakthroughs and improvements every year. This book is devoted to review and present novel approaches for some of the main issues involved in this exciting and vigorous technology. The book is composed of 22 chapters, written by authors coming from 30 different institutions located in 12 different countries throughout the Americas, Asia and Europe. Thus, reflecting the wide international contribution to the book. The broad range of subjects presented in the book offers a general overview of the main issues in modern solid-state circuit technology. Furthermore, the book offers an in depth analysis on specific subjects for specialists. We believe the book is of great scientific and educational value for many readers. I am profoundly indebted to the support provided by all of those involved in the work. First and foremost I would like to acknowledge and thank the authors who worked hard and generously agreed to share their results and knowledge. Second I would like to express my gratitude to the Intech team that invited me to edit the book and give me their full support and a fruitful experience while working together to combine this book

Analysis of quantum semiconductor heterostructures by ballistic electron emission spectroscopy

Ph.D.Thomas K. Gaylord, Elias N. Glytsis and Phillip N. First, Co-Chairs; Gary S. May and April S. Brown, Committee Member

Nanodot-based organic memory devices

In this study, resistor-type, diode-type, and transistor-type organic memory devices were investigated, aiming at the low-cost plastic integrated circuit applications. A series of solution-processing techniques including spin-coating, inkjet printing, and self-assembly were employed to fabricate these devices. The organic resistive memory device is based on a novel molecular complex film composed of tetracyanoquinodimethane (TCNQ) and a soluble methanofullerene derivative [6,6]-phenyl C61-butyric acid methyl ester (PCBM). It has an Al/molecules/Al sandwich structure. The molecular layer was formed by spin-coating technique instead of expensive vacuum deposition method. The current-voltage characteristics show that the device switches from the initial \u27low\u27 conduction state to \u27high\u27 conduction state upon application of external electric field at room temperature and return to \u27low\u27 conduction state when a high current pulse is applied. The on/off ratio is over 106. Each state has been found to remain stable for more than five months, even after the external electric field is removed. The PCBM nanodots wrapped by TCNQ molecules can form potential wells for charge trapping, and are believed to be responsible for the memory effects. A rewritable diode memory device was achieved in an improved configuration, i.e., ITO-PEDOT:PSS-PCBM/TCNQ-Al, where a semiconductor polymer PEDOT:PSS is used to form p+-N heterojunction with PCBM/TCNQ. It exhibits a diode characteristic (low conductive) before switching to a high-conductive Poole-Frenkel regime upon applying a positive external bias to ITO. The on/off ratio at +1.0 V is up to 105. Simulation results from Taurus-Medici are in qualitative agreement with the experimental results and the proposed charge storage model. The transistor-type memory device is fabricated on a heavily doped n-type silicon (n+-Si) substrate with a 100 nm thick thermally-grown oxide layer. The n+-Si serves as the gate electrode, while the oxide layer functions as the control gate dielectric. Gold nanoparticles as the charge storage units are deposited on the substrate by electrostatic self-assembly method. A self-assembled multilayer of polyelectrolytes, together with a thin spin-coated poly(4-vinyl phenol) layer, covers the gold nanoparticles and separates them from the poly(3-hexyl thiophene) channel. Conducting polymer PEDOT:PSS is inkjet printed to form the source/drain electrodes. The device exhibits significant hysteresis behavior in its Ids-Vgs characteristics. The charge storage in gold nanodots (diameter = 16 nm) was confirmed by comparing with devices having no gold nanoparticles, although the effects of interfacial traps may be also significant. The data retention time of the transistor memory is about 60 seconds, which needs to be further improved. It appears that this is the first demonstration of memory effects in an organic transistor caused by charge storage in metal nanodots in the gate dielectric. Therefore, the approach reported in this work offers a new direction to make low-cost organic transistor memories