The Value and Costs of Modularity: A Cognitive Perspective

This paper discusses the issue of modularity from a problem-solving perspective. Modularity is in fact a decomposition heuristic, through which a complex problem is decomposed into independent or quasi-independent sub-problems. By means of a model of problem decomposition, this paper studies the trade-offs of modularity: on the one hand finer modules increase the speed of search, but on the other hand they usually determine lock-in into sub-optimal solutions. How effectively to balance this trade-off depends upon the problem environment and its complexity and volatility: we show that in stationary and complex environments there exists an evolutionary advantage to over-modularization, while in highly volatile – though “simple” – en- vironments, contrary to usual wisdom, modular search is inefficient. The empirical relevance of our findings is discussed, especially with reference to the literature on system integration.modularity, problem solving, complex systems

Delay Estimator and Improved Proportionate Multi-Delay Adaptive Filtering Algorithm

This paper pertains to speech and acoustic signal processing, and particularly to a determination of echo path delay and operation of echo cancellers. To cancel long echoes, the number of weights in a conventional adaptive filter must be large. The length of the adaptive filter will directly affect both the degree of accuracy and the convergence speed of the adaptation process. We present a new adaptive structure which is capable to deal with multiple dispersive echo paths. An adaptive filter according to the present invention includes means for storing an impulse response in a memory, the impulse response being indicative of the characteristics of a transmission line. It also includes a delay estimator for detecting ranges of samples within the impulse response having relatively large distribution of echo energy. These ranges of samples are being indicative of echoes on the transmission line. An adaptive filter has a plurality of weighted taps, each of the weighted taps having an associated tap weight value. A tap allocation/control circuit establishes the tap weight values in response to said detecting means so that only taps within the regions of relatively large distributions of echo energy are turned on. Thus, the convergence speed and the degree of estimation in the adaptation process can be improved

Development and demonstration of an on-board mission planner for helicopters

Mission management tasks can be distributed within a planning hierarchy, where each level of the hierarchy addresses a scope of action, and associated time scale or planning horizon, and requirements for plan generation response time. The current work is focused on the far-field planning subproblem, with a scope and planning horizon encompassing the entire mission and with a response time required to be about two minutes. The far-feld planning problem is posed as a constrained optimization problem and algorithms and structural organizations are proposed for the solution. Algorithms are implemented in a developmental environment, and performance is assessed with respect to optimality and feasibility for the intended application and in comparison with alternative algorithms. This is done for the three major components of far-field planning: goal planning, waypoint path planning, and timeline management. It appears feasible to meet performance requirements on a 10 Mips flyable processor (dedicated to far-field planning) using a heuristically-guided simulated annealing technique for the goal planner, a modified A* search for the waypoint path planner, and a speed scheduling technique developed for this project

Energy Efficient Hardware Accelerators for Packet Classification and String Matching

This thesis focuses on the design of new algorithms and energy efficient high throughput hardware accelerators that implement packet classification and fixed string matching. These computationally heavy and memory intensive tasks are used by networking equipment to inspect all packets at wire speed. The constant growth in Internet usage has made them increasingly difficult to implement at core network line speeds. Packet classification is used to sort packets into different flows by comparing their headers to a list of rules. A flow is used to decide a packet’s priority and the manner in which it is processed. Fixed string matching is used to inspect a packet’s payload to check if it contains any strings associated with known viruses, attacks or other harmful activities. The contributions of this thesis towards the area of packet classification are hardware accelerators that allow packet classification to be implemented at core network line speeds when classifying packets using rulesets containing tens of thousands of rules. The hardware accelerators use modified versions of the HyperCuts packet classification algorithm. An adaptive clocking unit is also presented that dynamically adjusts the clock speed of a packet classification hardware accelerator so that its processing capacity matches the processing needs of the network traffic. This keeps dynamic power consumption to a minimum. Contributions made towards the area of fixed string matching include a new algorithm that builds a state machine that is used to search for strings with the aid of default transition pointers. The use of default transition pointers keep memory consumption low, allowing state machines capable of searching for thousands of strings to be small enough to fit in the on-chip memory of devices such as FPGAs. A hardware accelerator is also presented that uses these state machines to search through the payloads of packets for strings at core network line speeds

Model-based Fault-tolerant Control to Guarantee the Performance of a Hybrid Wind-Diesel Power System in a Microgrid Configuration

AbstractThis paper presents a comparison of two different adaptive control schemes for improving the performance of a hybrid wind-diesel power system in an islanded microgrid configuration against the baseline controller, IEEE type 1 automatic voltage regulator (AVR). The first scheme uses a model reference adaptive controller (MRAC) with a proportional-integral-derivative (PID) controller tuned by a genetic algorithm (GA) to control the speed of the diesel engine (DE) for regulating the frequency of the power system and uses a classical MRAC for controlling the voltage amplitude of the synchronous machine (SM). The second scheme uses a MRAC with a PID controller tuned by a GA to control the speed of the DE, and a MRAC with an artificial neural network (ANN) and a PID controller tuned by a GA for controlling the voltage amplitude of the SM. Different operating conditions of the microgrid and fault scenarios in the diesel engine generator (DEG) were tested: 1) decrease in the performance of the diesel engine actuator (40% and 80%), 2) sudden connection of 0.5 MW load, and 3) a 3-phase fault with duration of 0.5seconds. Dynamic models of the microgrid components are presented in detail and the proposed microgrid and its fault-tolerant control (FTC) are implemented and tested in the Simpower Systems of MATLAB/Simulink® simulation environment. The simulation results showed that the use of ANNs in combination with model-based adaptive controllers improves the FTC system performance in comparison with the baseline controller

Real-time implementation of a sensor validation scheme for a heavy-duty diesel engine

With ultra-low exhaust emissions standards, heavy-duty diesel engines (HDDEs) are dependent upon a myriad of sensors to optimize power output and exhaust emissions. Apart from acquiring and processing sensor signals, engine control modules should also have capabilities to report and compensate for sensors that have failed. The global objective of this research was to develop strategies to enable HDDEs to maintain nominal in-use performance during periods of sensor failures. Specifically, the work explored the creation of a sensor validation scheme to detect, isolate, and accommodate sensor failures in HDDEs. The scheme not only offers onboard diagnostic (OBD) capabilities, but also control of engine performance in the event of sensor failures. The scheme, known as Sensor Failure Detection Isolation and Accommodation (SFDIA), depends on mathematical models for its functionality. Neural approximators served as the modeling tool featuring online adaptive capabilities. The significance of the SFDIA is that it can enhance an engine management system (EMS) capability to control performance under any operating conditions when sensors fail. The SFDIA scheme updates models during the lifetime of an engine under real world, in-use conditions. The central hypothesis for the work was that the SFDIA scheme would allow continuous normal operation of HDDEs under conditions of sensor failures. The SFDIA was tested using the boost pressure, coolant temperature, and fuel pressure sensors to evaluate its performance. The test engine was a 2004 MackRTM MP7-355E (11 L, 355 hp). Experimental work was conducted at the Engine and Emissions Research Laboratory (EERL) at West Virginia University (WVU). Failure modes modeled were abrupt, long-term drift and intermittent failures. During the accommodation phase, the SFDIA restored engine power up to 0.64% to nominal. In addition, oxides of nitrogen (NOx) emissions were maintained at up to 1.41% to nominal