33 research outputs found

    Interface Circuits for Microsensor Integrated Systems

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    ca. 200 words; this text will present the book in all promotional forms (e.g. flyers). Please describe the book in straightforward and consumer-friendly terms. [Recent advances in sensing technologies, especially those for Microsensor Integrated Systems, have led to several new commercial applications. Among these, low voltage and low power circuit architectures have gained growing attention, being suitable for portable long battery life devices. The aim is to improve the performances of actual interface circuits and systems, both in terms of voltage mode and current mode, in order to overcome the potential problems due to technology scaling and different technology integrations. Related problems, especially those concerning parasitics, lead to a severe interface design attention, especially concerning the analog front-end and novel and smart architecture must be explored and tested, both at simulation and prototype level. Moreover, the growing demand for autonomous systems gets even harder the interface design due to the need of energy-aware cost-effective circuit interfaces integrating, where possible, energy harvesting solutions. The objective of this Special Issue is to explore the potential solutions to overcome actual limitations in sensor interface circuits and systems, especially those for low voltage and low power Microsensor Integrated Systems. The present Special Issue aims to present and highlight the advances and the latest novel and emergent results on this topic, showing best practices, implementations and applications. The Guest Editors invite to submit original research contributions dealing with sensor interfacing related to this specific topic. Additionally, application oriented and review papers are encouraged.

    Analysis of Current Conveyor based Switched Capacitor Circuits for Application in ∆Σ Modulators

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    The reduction in supply voltage, loss of dynamic range and increased noise prevent the analog circuits from taking advantage of advanced technologies. Therefore the trend is to move all signal processing tasks to digital domain where advantages of technology scaling can be used. Due to this, there exists a need for data converters with large signal bandwidths, higher speeds and greater dynamic range to act as an interface between real world analog and digital signals. The Delta Sigma (∆Σ) modulator is a data converter that makes use of large sampling rates and noise shaping techniques to achieve high resolution in the band of interest. The modulator consists of analog integrators and comparators which create a modulated digital bit stream whose average represents the input value. Due to their simplicity, they are popular in narrow band receivers, medical and sensor applications. However Operational Amplifiers (Op-Amps) or Operational Transconductance Amplifiers (OTAs), which are commonly used in data converters, present a bottleneck. Due to low supply voltages, designers rely on folded cascode, multistage cascade and bulk driven topologies for their designs. Although the two stage or multistage cascade topologies offer good gain and bandwidth, they suffer from stability problems due to multiple stages and feedback requiring large compensation capacitors. Therefore other low voltage Switched-Capacitor (SC) circuit techniques were developed to overcome these problems, based on inverters, comparators and unity gain buffers. In this thesis we present an alternative approach to design of ∆Σ modulators using Second Generation Current Conveyors (CCIIs). The important feature of these modulators is the replacement of the traditional Op-Amp based SC integrators with CCII based SC integrators. The main design issues such as the effect of the non-idealities in the CCIIs are considered in the operation of SC circuits and solutions are proposed to cancel them. Design tradeoffs and guidelines for various components of the circuit are presented through analysis of existing and the proposed SC circuits. A two step adaptive calibration technique is presented which uses few additional components to measure the integrator input output characteristic and linearize it for providing optimum performance over a wide range of sampling frequencies while maintaining low power and area. The presented CCII integrator and calibration circuit are used in the design of a 4th order (2-2 cascade) ∆Σ modulator which has been fabricated in UMC 90nm/1V technology through Europractice. Experimental values for Signal to Noise+Distortion Ratio (SNDR), Dynamic Range (DR) and Figure Of Merit (FOM) show that the modulator can compete with state of art reconfigurable Discrete-Time (DT) architectures while using lower gain stages and less design complexity

    NASA Tech Briefs, October 2001

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    Topics include: special coverage section on composites and plastics, electronic components and systems, software, mechanics, physical sciences, information sciences, book and reports, and a special sections of Photonics Tech Briefs and Motion Control Tech Briefs

    Diseño del driver y calibración de un sensor óptico

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    Este proyecto está basado en el diseño y montaje de un driver encargado de controlar un láser. El objetivo principal del trabajo es que el driver permita ajustar la potencia emitida (punto de trabajo). Por otro lado también debe permitir modular la potencia emitida a partir de una señal de entrada en el rango de decenas de kiloherzios. Para ello partimos de una amplitud de 3,3 V. Por último, diseñar la PCB, utilizando la herramienta OrCad Capture para el diseño del esquemático y OrCad Layout para el rutado y la creación de huellas.This Project is based on the design and the assembly of a driver to responsible for controlling a laser. The main objective of this project is that the driver should be allowed to adjust the output power (operating point). On the other side, the driver should also make possible to adjust the output power from an input signal in the range of tens of KHz. We start with a 3.3 V amplitude. Finally, I should design the PCB using Orcad Capture to make the design and Orcad Layout to root the PCB and to create the footprints.Ingeniería Electrónica Industrial y Automátic

    Workshop on Microwave Power Transmission and Reception. Workshop Paper Summaries

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    Microwave systems performance and phase control are discussed. Component design and reliability are highlighted. The power amplifiers, radiating elements, rectennas, and solid state configurations are described. The proper sizing of microwave transmission systems is also discussed

    The kinematics and vibration of planar linkage mechanisms

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    PhD ThesisThis thesis reports an investigation into three problems encountered in the design of linkage mechanisms, namely kinematic synthesis, balancing of inertia forces and vibration analysis. A general method of synthesizing planar linkages with pin and sliding joints using an Optimization approach has been investigated. A concise but easily interpreted technique for prescribing the topology of linkages formed by connecting pairs of links together has been developed. The displacement analysis of a linkage is achieved using a direct method which is considerably faster than alternative techniques. A nonlinear optimization algorithm has been modified to cater for non-linear constraints such as transmission angle. These techniques have been incorporated into a computer program. Two case-studies of using the program are given. The first is the synthesis of a six-bar linkage for a motorcycle rear suspension such that a constant centre distance is maintained between the chain-wheels as the suspension deflects. The second concerns the modification of two linkages, containing eight and ten links respectively, to give an improved knitting action for a warp-knitting machine. Operating linkages at high speeds can result in rapidly varying forces acting on the frame due to the mass of the moving links. A procedure to determine suitable counterweights to balance these forces has been developed. Since adding the counterweights may double the total mass of the linkage, the links should have minimum mass. If the mass of a link is reduced too far, the link may vibrate and so detrimentally affect the performance of the linkage. Accordingly the final part reports an investigation into the forced vibration, assuming stability, of a 'Uniform, pin-jointed, binary link. The equations of motion are derived and stability boundaries determined. The theoretical predictions are compared with experimental results from the coupler of a four-bar linkage.Science Research Council: Department of Industry
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