Low-Power, High-Speed Transceivers for Network-on-Chip Communication

Networks on chips (NoCs) are becoming popular as they provide a solution for the interconnection problems on large integrated circuits (ICs). But even in a NoC, link-power can become unacceptably high and data rates are limited when conventional data transceivers are used. In this paper, we present a low-power, high-speed source-synchronous link transceiver which enables a factor 3.3 reduction in link power together with an 80% increase in data-rate. A low-swing capacitive pre-emphasis transmitter in combination with a double-tail sense-amplifier enable speeds in excess of 9 Gb/s over a 2 mm twisted differential interconnect, while consuming only 130 fJ/transition without the need for an additional supply. Multiple transceivers can be connected back-to-back to create a source-synchronous transceiver-chain with a wave-pipelined clock, operating with 6sigma offset reliability at 5 Gb/s

AC Josephson effect in finite-length nanowire junctions with Majorana modes

It has been predicted that superconducting junctions made with topological nanowires hosting Majorana bound states (MBS) exhibit an anomalous 4\pi-periodic Josephson effect. Finding an experimental setup with these unconventional properties poses, however, a serious challenge: for finite-length wires, the equilibrium supercurrents are always 2\pi-periodic as anticrossings of states with the same fermionic parity are possible. We show, however, that the anomaly survives in the transient regime of the ac Josephson effect. Transients are moreover protected against decay by quasiparticle poisoning as a consequence of the quantum Zeno effect, which fixes the parity of Majorana qubits. The resulting long-lived ac Josephson transients may be effectively used to detect MBS.Comment: 9 pages, 4 figures, published version (with supplementary material