124 research outputs found
Four-element phased-array beamformers and a self-interference canceling full-duplex transciver in 130-nm SiGe for 5G applications at 26 GHz
This thesis is on the design of radio-frequency (RF) integrated front-end circuits for next generation 5G communication systems. The demand for higher data rates and lower latency in 5G networks can only be met using several new technologies including, but not limited to, mm-waves, massive-MIMO, and full-duplex. Use of mm-waves provides more bandwidth that is necessary for high data rates at the cost of increased attenuation in air. Massive-MIMO arrays are required to compensate for this increased path loss by providing beam steering and array gain. Furthermore, full duplex operation is desirable for improved spectrum efficiency and reduced latency. The difficulty of full duplex operation is the self-interference (SI) between transmit (TX) and receive (RX) paths. Conventional methods to suppress this interference utilize either bulky circulators, isolators, couplers or two separate antennas. These methods are not suitable for fully-integrated full-duplex massive-MIMO arrays. This thesis presents circuit and system level solutions to the issues summarized above, in the form of SiGe integrated circuits for 5G applications at 26 GHz. First, a full-duplex RF front-end architecture is proposed that is scalable to massive-MIMO arrays. It is based on blind, RF self-interference cancellation that is applicable to single/shared antenna front-ends. A high resolution RF vector modulator is developed, which is the key building block that empowers the full-duplex frontend architecture by achieving better than state-of-the-art 10-b monotonic phase control. This vector modulator is combined with linear-in-dB variable gain amplifiers and attenuators to realize a precision self-interference cancellation circuitry. Further, adaptive control of this SI canceler is made possible by including an on-chip low-power IQ downconverter. It correlates copies of transmitted and received signals and provides baseband/dc outputs that can be used to adaptively control the SI canceler. The solution comes at the cost of minimal additional circuitry, yet significantly eases linearity requirements of critical receiver blocks at RF/IF such as mixers and ADCs. Second, to complement the proposed full-duplex front-end architecture and to provide a more complete solution, high-performance beamformer ICs with 5-/6- b phase and 3-/4-b amplitude control capabilities are designed. Single-channel, separate transmitter and receiver beamformers are implemented targeting massive- MIMO mode of operation, and their four-channel versions are developed for phasedarray communication systems. Better than state-of-the-art noise performance is obtained in the RX beamformer channel, with a full-channel noise figure of 3.3 d
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On Enabling Concurrent Communications in Wireless Networks
Today innumerable devices use the wireless spectrum for communication, including cell-phones, WiFi devices, military radios, public safety radios, satellite phones etc. This crowding is limiting the experience of each device either through interference or by waiting fortheir turn to communicate. So, how do we allow a limited spectral resource to reliably scale to many more devices? This is possible through concurrent communication where multiple links share the spectrum and communicate simultaneously using multi-antenna techniques. One promising technique is Interference Alignment (IA), that has been shown to be Degrees-of-Freedom optimal under some conditions. Still, IA requires accurate channel knowledge to be effective and its ability to achieve high throughput under time varying wireless conditions is yet unproven. We make progress towards understanding these limitations and provide viable solutions.We study an IA system under different models of the time varying channel and derive expressions for the achieved rate over time and the system throughput. Using these, we can arrive at the optimal duration of the data phase that maximizes throughput. We proposetwo strategies that help to counter the effects of a time varying channel. First, data aided receiver beam-tracking along with link adaptation provides a sizable improvement in the received signal to interference and noise ratio. Second, updating the transmit beams during data transmission using short feedback pilots improves alignment at the receivers. In faster varying channels, we get a more stable achieved rate whereas in slower varying channels, we see additional throughput gains. The conclusion from this work is that an IA system must be trained more frequently than the channel coherence time to ensure high throughput and beam adaptation during the data phase gives significant robustness to the system.Lastly, we present an IA based medium access control (MAC) protocol that outperforms traditional protocols. Our concurrent carrier sense multiple access (CSMA) protocol based on beam-nulling is compatible with CSMA and increases the sum throughput by 2 to 3x.We also show that IA outperforms optimal time division multiple access under time varying conditions. Hence a well-designed IA system can enable reliable concurrent communications in a wireless network
REAL-TIME ADAPTIVE PULSE COMPRESSION ON RECONFIGURABLE, SYSTEM-ON-CHIP (SOC) PLATFORMS
New radar applications need to perform complex algorithms and process a large quantity of data to generate useful information for the users. This situation has motivated the search for better processing solutions that include low-power high-performance processors, efficient algorithms, and high-speed interfaces. In this work, hardware implementation of adaptive pulse compression algorithms for real-time transceiver optimization is presented, and is based on a System-on-Chip architecture for reconfigurable hardware devices. This study also evaluates the performance of dedicated coprocessors as hardware accelerator units to speed up and improve the computation of computing-intensive tasks such matrix multiplication and matrix inversion, which are essential units to solve the covariance matrix. The tradeoffs between latency and hardware utilization are also presented. Moreover, the system architecture takes advantage of the embedded processor, which is interconnected with the logic resources through high-performance buses, to perform floating-point operations, control the processing blocks, and communicate with an external PC through a customized software interface. The overall system functionality is demonstrated and tested for real-time operations using a Ku-band testbed together with a low-cost channel emulator for different types of waveforms
Dirty RF Signal Processing for Mitigation of Receiver Front-end Non-linearity
Moderne drahtlose Kommunikationssysteme stellen hohe und teilweise
gegensätzliche Anforderungen an die Hardware der Funkmodule, wie z.B.
niedriger Energieverbrauch, große Bandbreite und hohe Linearität. Die
Gewährleistung einer ausreichenden Linearität ist, neben anderen analogen
Parametern, eine Herausforderung im praktischen Design der Funkmodule. Der
Fokus der Dissertation liegt auf breitbandigen HF-Frontends für
Software-konfigurierbare Funkmodule, die seit einigen Jahren kommerziell
verfügbar sind. Die praktischen Herausforderungen und Grenzen solcher
flexiblen Funkmodule offenbaren sich vor allem im realen Experiment. Eines
der Hauptprobleme ist die Sicherstellung einer ausreichenden analogen
Performanz über einen weiten Frequenzbereich. Aus einer Vielzahl an
analogen Störeffekten behandelt die Arbeit die Analyse und Minderung von
Nichtlinearitäten in Empfängern mit direkt-umsetzender Architektur. Im
Vordergrund stehen dabei Signalverarbeitungsstrategien zur Minderung
nichtlinear verursachter Interferenz - ein Algorithmus, der besser unter
"Dirty RF"-Techniken bekannt ist. Ein digitales Verfahren nach der
Vorwärtskopplung wird durch intensive Simulationen, Messungen und
Implementierung in realer Hardware verifiziert. Um die Lücken zwischen
Theorie und praktischer Anwendbarkeit zu schließen und das Verfahren in
reale Funkmodule zu integrieren, werden verschiedene Untersuchungen
durchgeführt. Hierzu wird ein erweitertes Verhaltensmodell entwickelt, das
die Struktur direkt-umsetzender Empfänger am besten nachbildet und damit
alle Verzerrungen im HF- und Basisband erfasst. Darüber hinaus wird die
Leistungsfähigkeit des Algorithmus unter realen Funkkanal-Bedingungen
untersucht. Zusätzlich folgt die Vorstellung einer ressourceneffizienten
Echtzeit-Implementierung des Verfahrens auf einem FPGA. Abschließend
diskutiert die Arbeit verschiedene Anwendungsfelder, darunter spektrales
Sensing, robuster GSM-Empfang und GSM-basiertes Passivradar. Es wird
gezeigt, dass nichtlineare Verzerrungen erfolgreich in der digitalen
Domäne gemindert werden können, wodurch die Bitfehlerrate gestörter
modulierter Signale sinkt und der Anteil nichtlinear verursachter
Interferenz minimiert wird. Schließlich kann durch das Verfahren die
effektive Linearität des HF-Frontends stark erhöht werden. Damit wird der
zuverlässige Betrieb eines einfachen Funkmoduls unter dem Einfluss der
Empfängernichtlinearität möglich. Aufgrund des flexiblen Designs ist der
Algorithmus für breitbandige Empfänger universal einsetzbar und ist nicht
auf Software-konfigurierbare Funkmodule beschränkt.Today's wireless communication systems place high requirements on the
radio's hardware that are largely mutually exclusive, such as low power
consumption, wide bandwidth, and high linearity. Achieving a sufficient
linearity, among other analogue characteristics, is a challenging issue in
practical transceiver design. The focus of this thesis is on wideband
receiver RF front-ends for software defined radio technology, which became
commercially available in the recent years. Practical challenges and
limitations are being revealed in real-world experiments with these radios.
One of the main problems is to ensure a sufficient RF performance of the
front-end over a wide bandwidth. The thesis covers the analysis and
mitigation of receiver non-linearity of typical direct-conversion receiver
architectures, among other RF impairments. The main focus is on DSP-based
algorithms for mitigating non-linearly induced interference, an approach
also known as "Dirty RF" signal processing techniques. The conceived
digital feedforward mitigation algorithm is verified through extensive
simulations, RF measurements, and implementation in real hardware. Various
studies are carried out that bridge the gap between theory and practical
applicability of this approach, especially with the aim of integrating that
technique into real devices. To this end, an advanced baseband behavioural
model is developed that matches to direct-conversion receiver architectures
as close as possible, and thus considers all generated distortions at RF
and baseband. In addition, the algorithm's performance is verified under
challenging fading conditions. Moreover, the thesis presents a
resource-efficient real-time implementation of the proposed solution on an
FPGA. Finally, different use cases are covered in the thesis that includes
spectrum monitoring or sensing, GSM downlink reception, and GSM-based
passive radar. It is shown that non-linear distortions can be successfully
mitigated at system level in the digital domain, thereby decreasing the bit
error rate of distorted modulated signals and reducing the amount of
non-linearly induced interference. Finally, the effective linearity of the
front-end is increased substantially. Thus, the proper operation of a
low-cost radio under presence of receiver non-linearity is possible. Due to
the flexible design, the algorithm is generally applicable for wideband
receivers and is not restricted to software defined radios
Compensation of fibre impairments in coherent optical systems
Tese de mestrado integrado. Engenharia Electrotécnica e de Computadores. Faculdade de Engenharia. Universidade do Porto. 201
Ultra-Wideband Secure Communications and Direct RF Sampling Transceivers
Larger wireless device bandwidth results in new capabilities in terms of higher data rates and security. The 5G evolution is focus on exploiting larger bandwidths for higher though-puts. Interference and co-existence issues can also be addressed by the larger bandwidth in the 5G and 6G evolution. This dissertation introduces of a novel Ultra-wideband (UWB) Code Division Multiple Access (CDMA) technique to exploit the largest bandwidth available in the upcoming wireless connectivity scenarios. The dissertation addresses interference immunity, secure communication at the physical layer and longer distance communication due to increased receiver sensitivity. The dissertation presents the design, workflow, simulations, hardware prototypes and experimental measurements to demonstrate the benefits of wideband Code-Division-Multiple-Access. Specifically, a description of each of the hardware and software stages is presented along with simulations of different scenarios using a test-bench and open-field measurements. The measurements provided experimental validation carried out to demonstrate the interference mitigation capabilities. In addition, Direct RF sampling techniques are employed to handle the larger bandwidth and avoid analog components. Additionally, a transmit and receive chain is designed and implemented at 28 GHz to provide a proof-of-concept for future 5G applications. The proposed wideband transceiver is also used to demonstrate higher accuracy direction finding, as much as 10 times improvement
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