Automatic mapping tasks to cores : Evaluating AMTHA Algorithm in multicore architectures

The AMTHA (Automatic Mapping Task on Heterogeneous Architectures) algorithm for task-to-processors assignment and the MPAHA (Model of Parallel Algorithms on Heterogeneous Architectures) model are presented. The use of AMTHA is analyzed for multicore processor-based architectures, considering the communication model among processes in use. The results obtained in the tests carried out are presented, comparing the real execution times on multicores of a set of synthetic applications with the predictions obtained with AMTHA. Finally current lines of research are presented, focusing on clusters of multicores and hybrid programming paradigmsPresentado en el IX Workshop Procesamiento Distribuido y Paralelo (WPDP)Red de Universidades con Carreras en Informática (RedUNCI

Dynamic scheduling in heterogeneous multiprocessor architectures : Efficiency analysis

A MPAHA (Model for Parallel Algorithms on Heterogeneous Architectures) model that allows predicting parallel application performance running over heterogeneous architectures is presented. MPAHA considers the heterogeneity of processors and communications. From the results obtained with the MPAHA model, the AMTHA (Automatic Mapping Task on Heterogeneous Architectures) algorithm for task-to-processors assignment is presented and its implementation is analyzed. DCS_AMTHA, a dynamic scheduling strategy for multiple applications on heterogeneous multiprocessor architectures, is defined and experimental results focusing on global efficiency are presented. Finally, current lines of research related with model extensions for clusters of multicores are mentioned.Presentado en el IX Workshop Procesamiento Distribuido y Paralelo (WPDP).Red de Universidades con Carreras en Informática (RedUNCI

Automatic mapping tasks to cores : Evaluating AMTHA Algorithm in multicore architectures

The AMTHA (Automatic Mapping Task on Heterogeneous Architectures) algorithm for task-to-processors assignment and the MPAHA (Model of Parallel Algorithms on Heterogeneous Architectures) model are presented. The use of AMTHA is analyzed for multicore processor-based architectures, considering the communication model among processes in use. The results obtained in the tests carried out are presented, comparing the real execution times on multicores of a set of synthetic applications with the predictions obtained with AMTHA. Finally current lines of research are presented, focusing on clusters of multicores and hybrid programming paradigmsPresentado en el IX Workshop Procesamiento Distribuido y Paralelo (WPDP)Red de Universidades con Carreras en Informática (RedUNCI

Dynamic scheduling in heterogeneous multiprocessor architectures : Efficiency analysis

A MPAHA (Model for Parallel Algorithms on Heterogeneous Architectures) model that allows predicting parallel application performance running over heterogeneous architectures is presented. MPAHA considers the heterogeneity of processors and communications. From the results obtained with the MPAHA model, the AMTHA (Automatic Mapping Task on Heterogeneous Architectures) algorithm for task-to-processors assignment is presented and its implementation is analyzed. DCS_AMTHA, a dynamic scheduling strategy for multiple applications on heterogeneous multiprocessor architectures, is defined and experimental results focusing on global efficiency are presented. Finally, current lines of research related with model extensions for clusters of multicores are mentioned.Presentado en el IX Workshop Procesamiento Distribuido y Paralelo (WPDP).Red de Universidades con Carreras en Informática (RedUNCI

A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures

This paper discusses automatic mapping methods for concurrent tasks to processors applying graph analysis for the relation among tasks, in which processing and communicating times are incorporated. Starting by an analysis in which processors are homogeneous and data transmission times do not depend on the processors that are communicating (a typical case in homogeneous clusters), we progress to extend the model to heterogeneous processors having the possibility of different communication levels, applicable to a multicluster. Some results obtained with the model and future work lines are presented, particularly, the possibility of obtaining the required optimal number of processors, keeping a constant efficiency level.Facultad de Informátic

Robustness Analysis for the Method of Assignment MATEHa

ABSTRACT The TTIGHa model has been developed to model and predict the performance of parallel applications run over heterogeneous architectures. In addition, the task assignment algorithm was implemented to MATEHa processors based on the TTIGHa model. This paper analyzes the assignment algorithm robustness before different variations which the model parameters may undergo (basically, communication and processing times)

Robustness analysis for the method of assignment MATEHa

The TTIGHa model has been developed to model and predict the performance of parallel applications run over heterogeneous architectures. In addition, the task assignment algorithm was implemented to MATEHa processors based on the TTIGHa model. This paper analyzes the assignment algorithm robustness before different variations which the model parameters may undergo (basically, communication and processing times).Facultad de Informátic

EFFICIENT SCHEDULING OF DYNAMIC PROGRAMMING ALGORITHMS ON MULTICORE ARCHITECTURES

Dynamic programming is one of the Berkley 13 dwarfs widely used for solving various combinatorial and optimization problems, including matrix chain multiplication, longest common subsequence, binary (0/1) knapsack and so on. Due to nonuniformity in the inherent dependence in dynamic programming algorithms, it becomes necessary to schedule the subproblems of dynamic programming effectively to processing cores for optimal utilization of multicore technology. The computational matrix of dynamic programming is divided into three parts; growing region, stable region and shrinking region depending on whether the number of subproblems increases, remain stable or decreases uniformly phase by phase respectively. We realize the parallel implementations of matrix chain multiplication, longest common subsequence and 0/1 knapsack on Intel Xeon X5650 and E5-2695 using OpenMP with different scheduling policies and adequate chunk sizes. It is concluded that, for the growing or the shrinking region of dynamic programming parallelization adopted in this article, guided schedule is better as compared to other scheduling scheme. Static or dynamic schedule is better for the stable region of dynamic programming. Dynamic programming approach, where all three regions are present, more speedup is achieved by applying the mixed scheduling approach rather than applying only single scheduling technique for the entire computations. In LCS, approximately 20% more speedup is achieved using a mixed scheduling technique over the conventional single scheduling approach on Intel Xeon E5-2695

Análisis de la robustez del método de asignación MATEHa

Se desarrolló el modelo TTIGHa utilizado para modelizar y predecir performance de aplicaciones paralelas que se ejecutan sobre arquitecturas heterogéneas. Además, se implementó el algoritmo de asignación de tareas a procesadores MATEHa basado en el modelo TTIGHa. En este trabajo se analiza la robustez del algoritmo de asignación frente a diferentes variaciones que pueden sufrir los parámetros del modelo (básicamente tiempos de comunicación y tiempos de procesamiento). Palabras Clave: Sistemas Paralelos. Arquitecturas de Cluster y Multicluster. Modelos de predicción de performance. Mapeo de tareas a procesadores. Heterogeneidad. Robustez.The TTIGHa model has been developed to model and predict the performance of parallel applications run over heterogeneous architectures. In addition, the task assignment algorithm was implemented to MATEHa processors based on the TTIGHa model. This paper analyzes the assignment algorithm robustness before different variations which the model parameters may undergo (basically, communication and processing times).VIII Workshop de Procesamiento Distribuido y ParaleloRed de Universidades con Carreras en Informática (RedUNCI