Resilient Pathways to Atomic Attachment of Quantum Dot Dimers and Artificial Solids from Faceted CdSe Quantum Dot Building Blocks.

The goal of this work is to identify favored pathways for preparation of defect-resilient attached wurtzite CdX (X = S, Se, Te) nanocrystals. We seek guidelines for oriented attachment of faceted nanocrystals that are most likely to yield pairs of nanocrystals with either few or no electronic defects or electronic defects that are in and of themselves desirable and stable. Using a combination of in situ high-resolution transmission electron microscopy (HRTEM) and electronic structure calculations, we evaluate the relative merits of atomic attachment of wurtzite CdSe nanocrystals on the {11̅00} or {112̅0} family of facets. Pairwise attachment on either facet can lead to perfect interfaces, provided the nanocrystal facets are perfectly flat and the angles between the nanocrystals can adjust during the assembly. Considering defective attachment, we observe for {11̅00} facet attachment that only one type of edge dislocation forms, creating deep hole traps. For {112̅0} facet attachment, we observe that four distinct types of extended defects form, some of which lead to deep hole traps whereas others only to shallow hole traps. HRTEM movies of the dislocation dynamics show that dislocations at {11̅00} interfaces can be removed, albeit slowly. Whereas only some extended defects at {112̅0} interfaces could be removed, others were trapped at the interface. Based on these insights, we identify the most resilient pathways to atomic attachment of pairs of wurtzite CdX nanocrystals and consider how these insights can translate to the creation of electronically useful materials from quantum dots with other crystal structures

Guidelines for developing optical clocks with 10−1810^{-18} fractional frequency uncertainty

There has been tremendous progress in the performance of optical frequency standards since the first proposals to carry out precision spectroscopy on trapped, single ions in the 1970s. The estimated fractional frequency uncertainty of today's leading optical standards is currently in the $10^{-18}$ range, approximately two orders of magnitude better than that of the best caesium primary frequency standards. This exceptional accuracy and stability is resulting in a growing number of research groups developing optical clocks. While good review papers covering the topic already exist, more practical guidelines are needed as a complement. The purpose of this document is therefore to provide technical guidance for researchers starting in the field of optical clocks. The target audience includes national metrology institutes (NMIs) wanting to set up optical clocks (or subsystems thereof) and PhD students and postdocs entering the field. Another potential audience is academic groups with experience in atomic physics and atom or ion trapping, but with less experience of time and frequency metrology and optical clock requirements. These guidelines have arisen from the scope of the EMPIR project "Optical clocks with $1 imes 10^{-18}$ uncertainty" (OC18). Therefore, the examples are from European laboratories even though similar work is carried out all over the world. The goal of OC18 was to push the development of optical clocks by improving each of the necessary subsystems: ultrastable lasers, neutral-atom and single-ion traps, and interrogation techniques. This document shares the knowledge acquired by the OC18 project consortium and gives practical guidance on each of these aspects

The development of microfabricated ion traps towards quantum information and simulation

Trapped ions within Paul traps have shown to be a promising architecture in the realisation of a quantum information processor together with the ability of providing quantum simulations. Linear Paul traps have demonstrated long coherence times with ions being well isolated from the environment, single and multi-qubit gates and the high fidelity detection of states. The scalability to large number of qubits, incorporating all the previous achievements requires an array of linear ion traps. Microfabrication techniques allow for fabrication and micron level accuracy of the trap electrode dimensions through photolithography techniques. The first part of this thesis presents the experiential setup and trapping of Yb+ ions needed to test large ion trap arrays. This include vacuum systems that can host advanced symmetric and asymmetric ion traps with up to 90 static voltage control electrodes. Demonstration of a single trapped Yb+ ion within a two-layer macroscopic ion trap is presented. with an ion-electrode distance of 310(10) μm. The anomalous heating rate and spectral noise density of the trap was measured, a main form of decoherence within ion traps. The second half of this thesis presents the design and fabrication of multi-layer asymmetric ion traps. This allows for isolated electrodes that cannot be accessed via surface pathways, allowing for higher density of electrodes as well as creating novel trap designs that allow for the potential of quantum simulations to be demonstrated. These include two-dimensional lattices and ring trap designs in which the isolated electrodes provide more control in the ion position. For the microfabrication of these traps I present a novel high-aspect ratio electroplated electrode design that provides shielding of the dielectric layer. This provides a means to mitigate stray electric field due to charge build up on the dielectric surfaces. Electrical testing of the trap structures was performed to test bulk breakdown and surface flashover of the ion trap architectures. Results showed sufficient isolation between electrodes for both radio frequency and static breakdown. Surface flashover voltage measurements over the dielectric layer showed an improvement of more than double over previous results using a new fabrication technique. This will allow for more powerful ion trap chips needed for the next generation of microfabricated ion trap arrays for scalable quantum technologies

Engineering artificial atomic systems of giant electric dipole moment

The electric dipole moment (EDM) plays a crucial role in determining the interaction strength of an atom with electric fields, making it paramount to quantum technologies based on coherent atomic control. We propose a scheme for engineering the potential in a Paul trap to realize a two-level quantum system with a giant EDM formed by the motional states of a trapped electron. We show that, under realistic experimental conditions, the EDM can significantly exceed the ones attainable with Rydberg atoms. Furthermore, we show that such artificial atomic dipoles can be efficiently initialized, readout, and coherently controlled, thereby providing a potential platform for quantum technologies such as ultrahigh-sensitivity electric-field sensing.Comment: 7 pages, 4 5 figures + 26 pages Supplemental Material. Comments are welcom

Design and fabrication of ion traps for a scalable microwave quantum computer

This thesis describes the experimental work towards the development of a scalable quantum computer based on microfabricated ion trap using long-wavelength radiation and magnetic field gradient. There are three key elements in implementing such a quantum computer: the junction trap to shuttle ions, the structure to generate high gradient magnetic field and the structure to induce strong microwave coupling to the ions. A new dynamic simulation tool was developed addressing the problems faced by static solvers. This tool was used to aid the design and optimisation of an X junction geometry allowing the ions to be shuttled with minimised motional heating gain. The design and fabrication techniques were reported on the structure to generate a high gradient magnetic field. A discussion was given on the design of producing microwave and maximise the coupling to the cold ions. A review was given on the far-field methods and near-field methods. A novel design was reported where the single-qubit gate is predicted to be 45 times faster than a conventional setup. Two essential topics on the microfabrication of a reliable scalable quantum computer unit were discussed: breakdown and RF loss. Investigation using numerical simulations showed that dielectric can breakdown due to high voltage and local heating which are results of impedance mismatch. Microfabrication processes were improved, high-quality films were reported to have twice as much breakdown voltages. The mechanisms of RF loss were reviewed. Novel structures and smooth electroplating technique were developed to minimise the loss. A low loss ion trap was produced and tested. An experimentally observed anomalous glow discharge phenomenon was reported and investigated

Design guidelines for assessing and controlling spacecraft charging effects

The need for uniform criteria, or guidelines, to be used in all phases of spacecraft design is discussed. Guidelines were developed for the control of absolute and differential charging of spacecraft surfaces by the lower energy space charged particle environment. Interior charging due to higher energy particles is not considered. A guide to good design practices for assessing and controlling charging effects is presented. Uniform design practices for all space vehicles are outlined

Opportunities from Doping of Non-Critical Metal Oxides in Last Generation Light-Conversion Devices

The need to develop sustainable energy solutions is an urgent requirement for society, with the additional requirement to limit dependence on critical raw materials, within a virtuous circular economy model. In this framework, it is essential to identify new avenues for light-conversion into clean energy and fuels exploiting largely available materials and green production methods. Metal oxide semiconductors (MOSs) emerge among other species for their remarkable environmental stability, chemical tunability, and optoelectronic properties. MOSs are often key constituents in next generation energy devices, mainly in the role of charge selective layers. Their use as light harvesters is hitherto rather limited, but progressively emerging. One of the key strategies to boost their properties involves doping, that can improve charge mobility, light absorption and tune band structures to maximize charge separation at heterojunctions. In this review, effective methods to dope MOSs and to exploit the derived benefits in relation to performance enhancement in different types of devices are identified and critically compared. The work is focused specifically on the best opportunities coming from the use of non-critical raw materials, so as to contribute in defining an economically feasible roadmap for light conversion technologies based on these highly stable and widely available compounds

Index to NASA Tech Briefs, 1975

This index contains abstracts and four indexes--subject, personal author, originating Center, and Tech Brief number--for 1975 Tech Briefs

Product assurance technology for procuring reliable, radiation-hard, custom LSI/VLSI electronics

Advanced measurement methods using microelectronic test chips are described. These chips are intended to be used in acquiring the data needed to qualify Application Specific Integrated Circuits (ASIC's) for space use. Efforts were focused on developing the technology for obtaining custom IC's from CMOS/bulk silicon foundries. A series of test chips were developed: a parametric test strip, a fault chip, a set of reliability chips, and the CRRES (Combined Release and Radiation Effects Satellite) chip, a test circuit for monitoring space radiation effects. The technical accomplishments of the effort include: (1) development of a fault chip that contains a set of test structures used to evaluate the density of various process-induced defects; (2) development of new test structures and testing techniques for measuring gate-oxide capacitance, gate-overlap capacitance, and propagation delay; (3) development of a set of reliability chips that are used to evaluate failure mechanisms in CMOS/bulk: interconnect and contact electromigration and time-dependent dielectric breakdown; (4) development of MOSFET parameter extraction procedures for evaluating subthreshold characteristics; (5) evaluation of test chips and test strips on the second CRRES wafer run; (6) two dedicated fabrication runs for the CRRES chip flight parts; and (7) publication of two papers: one on the split-cross bridge resistor and another on asymmetrical SRAM (static random access memory) cells for single-event upset analysis